The inner tracker of the ATLAS detector will be replaced at the future upgrade to keep the performance at high luminosity operation. We have developed the super-module integration concept based on double-sided silicon strip modules. A super-module consists of twelve double-sided modules, each of these having 80 readout ASICs. Each chip has 128 readout channels, thus a total of 122880 channels per super-module. Since the number of readout strips becomes very large to keep the hit occupancy at an acceptable level, the data readout is one of the key issues. We have developed a readout system based on the Soi Evaluation BoArd with Sitcp (SEABAS). The SEABAS processes the data from the super-modules by means of an FPGA (User-FPGA) and transfers data to a computer via Ether-net with SiTCP protocol, a technology to realize direct access and transfer the data in the memory of the User-FPGA from the PC by utilizing TCP/IP and UDP communication with a dedicated FPGA. We developed the firmware and the software for the SEABAS, together with the readout hardware chain, and established basic functionality for reading out the super-module.