DC-link Ripple Reduction in a DPWM-Based Two-Level VSI

Abstract

This paper proposes a new method to reduce the ripple current of the DC-link capacitor in a two-level voltage source inverter (VSI), with a discontinuous pulse-width modulation (DPWM). In real applications, a capacitor block is very bulky, due to the parallel connection of several capacitors that share the value of the ripple current. Hence, it contributes significantly to the volume and weight of the whole system. Conventional DPWM is used to minimize the amount of switching for the power transistors, therefore, reducing stress and power loss. This leads to increased efficiency and reliability of the system. Nevertheless, the reduction of the DC link ripple current is still not optimal. Therefore, the proposed method introduces a PWM phase-shift technique to provide further reduction of the DC-link ripple current in a DPWM-based VSI. The efficacy of the proposed method is confirmed by simulation and experimental results.

Effect of Unipolar and Bipolar SPWM on the Lifetime of DC-link Capacitors in Single-Phase Voltage Source Inverters

“…The modelling and simulations are carried out in PLECS to obtain the I cap spectrum corresponding to each case. It is then exported to MATLAB, where the actual I cap is calculated as explained in [6] from its spectrum. Finally, the L x of the capacitor is estimated using (7) and the results are shown in Fig.…”

“…Aluminum electrolytic capacitors (El-caps) are one of the most commonly used DC-link capacitors, due to their advantage of providing a high capacitance per unit volume at low costs compared to other types of capacitors. However, recent studies show that capacitors, in general, contribute to 30% of the total failure root causes in the power electronic systems [5] and they are considered as the most fragile components in a power electronic system [3]- [6].…”

Improved Deadbeat FC-MPC Based on the Discrete Space Vector Modulation Method with Efficient Computation for a Grid-Connected Three-Level Inverter System

“…The main advantage of this proposed method is that it is straightforward and easily implemented, without additional hardware or extensive computation. Furthermore, it is known that by using DPWM, the switching losses are reduced, and better harmonic characteristics can be obtained for high modulation indices, compared with inverters that use continuous pulse-width modulation [23][24][25][26]. Although there are several different DPWM methods, conventional 60 • DPWM is most commonly used for systems with the unity power factor.…”

DC-link Current Harmonic Mitigation via Phase-shifting of Carrier Waves in Paralleled Inverter Systems

“…DC-harmonic analysis -using optimal phase-shift angle for the carrier signal It can be seen that adopting the proposed method helps to reduce the dominant 181 switching harmonic components ( f sw_harmonic = 40kHz, 80kHz, 120kHz) in the DC-capacitor 182 bank current, and overall RMS capacitor bank current. As a result, the electro-thermal 183 stress for each capacitor reduces thereby increasing its life expectancy calculated using 184 Equations ( 10)- (12), as shown in Table 7. From the industry point of view, it is important to have a lower DC-capacitor bank current as a lesser number capacitor is now needed, 186 which helps to lower the cost of the overall system.…”

“…Also, the power loss of the capacitor, which is a function of the current harmonic spectrum and its Equivalent Series Resistance (ESR) increases as the capacitor current increases [8]. Several studies show that 30% of the total failure root causes in the power electronic systems are due to capacitors failures [9], and hence they are considered as the most fragile components in a power electronic system [9][10][11][12]. In order to extend the lifetime of the DC-link capacitor, two possible solutions are considered.…”