Decoupling Controller Design for H ∞ Performance Condition

-This paper introduces an efficient voltage multiplier circuit for improved voltage gain and power efficiency of radio frequency identification (RFID) tags. The multiplier is fully integratable and takes advantage of both passive and active circuits to reduce the required input power while yielding the desired DC voltage. A six-stage voltage multiplier and an ultralow power voltage regulator are designed in a 0.13 µm complementary metal-oxide semiconductor process for 2.45 GHz RFID applications. The minimum required input power for a 1.2 V supply voltage in the case of a 50 Ω antenna is -20.45 dBm. The efficiency is 15.95% for a 1 MΩ load. The regulator consumes 129 nW DC power and maintains the reference voltage in a 1.1% range with V dd varying from 0.8 to 2 V. The power supply noise rejection of the regulator is 42 dB near a 2.45 GHz frequency and performs better than -32 dB from 100 Hz to 10 GHz frequencies.

Design of UHF CMOS Front-ends for Near-field Communications

Hamedi-Hagh¹,

Tabesh²,

Oh³

et al. 2011

Transmission Line Analysis of Accumulation Layer in IEGT

Moon¹,

Chung²

2011

-Transmission line analysis of the surface accumulation layer in injection-enhanced gate transistor (IEGT) is presented for the first time, based on per-unit-length resistance and conductance of the surface layer beneath the gate of IEGT. Lateral electric field on the accumulation layer surface, as well as the electron current injected into the accumulation layer, is governed by the well-known wave equation, and decreases as an exponential function of the lateral distance from the cathode. Unit-length resistance and conductance of the layer are expressed in terms of the device parameters and the applied gate voltage. Results obtained from the experiments are consistent with the numerical simulations.

Preparation and Characterization of Plasma Polymerized Methyl Methacrylate Thin Films as Gate Dielectric for Organic Thin Film Transistor

Ao¹,

Lim²,

Shin³

2011

-Plasma polymerized methyl methacrylate (ppMMA) thin films were deposited by plasma polymerization technique with different plasma powers and subsequently thermally treated at temperatures of 60 to 150 °C. To find a better ppMMA preparation technique for application to organic thin film transistor (OTFT) as dielectric layer, the chemical composition, surface morphology, and electrical properties of ppMMA were investigated. The effect of ppMMA thin-film preparation conditions on the resulting thin film properties were discussed, specifically O-H site content in the ppMMA, dielectric constant, leakage current density, and hysteresis.