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We report the latest works on via interconnects of future memory or LSI devices, where multi-wall carbon nanotubes (MWCNTs) are used instead of conventional metals. MWCNTs are grown vertically in 80 nm via holes using plasma-enhanced chemical vapor deposition. The carbon nanotube (CNT) via interconnects are integrated into an 8-inch Si wafer in full compatibility with conventional semiconductor processes. We have used buried catalyst method for the catalyst layer deposition, two-step etch method for achieving via etch stop on the thin catalyst layer (ca. 3 nm), and the chemical mechanical polishing (CMP) process for cutting CNT. The two-step etch method is composed of two consecutive etch steps: the first step is a conventional oxide etch while the second step chemically etches the silicon nitride layer to relieve the damage of the catalyst layer. After a full integration, a resistance of 293 ∼ 493 and a CNT density of about 4 × 10 11 /cm 2 have been achieved for the 80 nm via. These results show that the 2-step etch scheme is a promising candidate for the realization of CNT interconnects in conventional semiconductor devices.

Plasma polymerized methyl methaclylate (ppMMA) thin films were prepared with various process conditions such as inductively coupled plasma (ICP) power, substrate bias power, working pressure, substrate heating temperature, substrate position, and monomer flow rate. Thickness, surface morphology, dielectric constant, and leakage current of the ppMMA thin films were investigated for application to organic thin film transistor as gate dielectric. Deposition rate of over 8.6 nm/min, dielectric constant of 3.4, and leakage current density of 8:9 Â 10 À9 A/cm À2 at electric field of 1 MV/cm were achieved for the ppMMA thin film prepared at the optimized process condition: plasma power of RF 100 W; Ar flow rate of 20 sccm; working pressure of 5 mTorr; substrate temperature of 100 C; substrate position of 100 mm. The ppMMA thin film was then applied to pentacene based organic thin film transistor (OTFT) device fabrication. The OTFT device with 80 nm thick pentacene semiconductor layer showed field effect mobility of 0.144 cm 2 V À1 s À1 and threshold voltage of À1:72 V. #

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-Plasma polymerized methyl methacrylate (ppMMA) thin films were deposited by plasma polymerization technique with different plasma powers and subsequently thermally treated at temperatures of 60 to 150 °C. To find a better ppMMA preparation technique for application to organic thin film transistor (OTFT) as dielectric layer, the chemical composition, surface morphology, and electrical properties of ppMMA were investigated. The effect of ppMMA thin-film preparation conditions on the resulting thin film properties were discussed, specifically O-H site content in the ppMMA, dielectric constant, leakage current density, and hysteresis.