Deep SiC etching with RIE

Abstract

SiC is currently an important topic in power devices. This new technology leads to lower power losses, faster switching, and higher working temperature. The design of SiC power devices requires the integration of edge termination techniques to obtain a high blocking voltage. The mesa structure approach is one wellestablished method. It could be used alone or in combination with a Junction Termination Extension (JTE). The mesa consists of a structure that removes material around the pn-junction. Due to the strong Si-C bonds, conventional chemical-wet etching solutions are inefficient on SiC, so plasma methods are required to etch SiC.The presented work is based on the use of an RIE reactor with an SF 6 /O 2 plasma. Its geometry structure and parameters were optimized. An etch rate of 0.35 µm/min was obtained without any trenching phenomenon. Trenches deeper than 10 µm deep were realized with a nickel etching mask that shows a high selectivity. AFM analysis revealed an etched surface as smooth as the initial one.

Crystal structure induced residue formation on 4H-SiC by reactive ion etching

“…It was reported that this ratio was optimal to get the highest etch rate in SiC etching. 24 The surface roughness after 30 min etching is shown in Figure 1(a). Small spikes, oriented in the same direction, can be seen among indistinguishable roughness features.…”

“…The result is consistent with the reference. 24 In the 5 Pa-work pressure series, the etching power is 200 W and the etching time is 480 min. Different form the 3.5 Pa-work pressure series, the spike density is very high as shown in Figure 4.…”

Study of breakdown characteristics of 4H-SiC Schottky diode with improved 2-step mesa junction termination extension

“…The maximum breakdown voltage it could achieve is almost the same as the parallel plane breakdown voltage when D1 is equal to and more than 6 μm. However, in reality the etching depth of the mesa JTE would not normally go beyond 5 μm, since this would degrade the surface roughness significantly as reported in literature [12] and it is a challenge in terms of processing to have a mask that could withstand the long time etch of SiC. Fig.4 shows the 2-D electric field distribution of twosteps JTE with different etching depth D1 and whilst keeping D2 and W constant, and Fig.5 shows their corresponding breakdown voltages.…”

Silicon Carbide Based Transit Time Devices: The New Frontier in High-power THz Electronics

“…The more appropriate dry plasma etching, Reactive Ion Etching (RIE), may be used in separating the diode mesa. Patterning of mesas may be carried out with photoresists: AZ 5214 (standard) and TI 35 ES (special photoresist for deep RIE Si etching) (Lazar et al, 2006). A titanium/nickel (Ti/Ni) bilayer metal can be evaporated onto the sample.…”