Deep Source Metal Trenches in GaN-On-Si HEMTs for Relieving Current Collapse

Abstract

The dynamic on-resistance increase during power switching is one of the challenges of GaN-based HEMTs (high-electron-mobility transistors) for power electronic applications. Both the surface traps and buffer traps reduce channel carriers, resulting in decreased operating current during power switching. In this work, we propose a source metal trench toward the buffer region to alleviate channel carriers' trapping in the buffer region. We compare the dynamic behaviors of the HEMTs with the source trench fabricated within and out of the mesa region. The results indicate less dynamic on-resistance increase at higher drain and gate stress voltages of the device with source trench in the mesa, as compared with the device with source trench fabricated away from mesa, or the one without a trench. We further develop physical models, including multiple current-conducting paths, reduction of buffer traps through source trench, and the re-distribution of the electric field profile, to explain the phenomenon.

GaN Vertical Transistors with Staircase Channels for High-Voltage Applications

“…Therefore, similar to Si power MOSFETs (metal-oxide semiconductor field-effect transistors), GaN vertical transistors have been studied by growing GaN epilayers on GaN substrate. Because lateral GaN power devices on Si substrate suffer from current collapse during high-voltage operation due to carrier trapping in the buffer region [ 9 , 10 ]. GaN on GaN devices have additional advantages.…”

Current Collapse Conduction Losses Minimization in GaN Based PMSM Drive

“…The phenomenon is also being extensively measured on various structures too [13,14]. There are also current-collapse-free GaN transistors under development [15][16][17]. However, presently available GaN devices still exhibit the deteriorated behavior caused by the increased on-state resistance.…”