Defect Engineering in Thickness-Controlled Bi₂O₂Se-Based Transistors by Argon Plasma Treatment

Abstract

We present a simple, effective, and controllable method to uniformly thin down the thickness of as-exfoliated two-dimensional Bi2O2Se nanoflakes using Ar+ plasma treatment. Atomic force microscopy (AFM) images and Raman spectra indicate that the surface morphology and crystalline quality of etched Bi2O2Se nanoflakes remain almost unaffected. X-ray photoelectron spectra (XPS) indicate that the O and Se vacancies created during Ar+ plasma etching on the top surface of Bi2O2Se nanoflakes are passivated by forming an ultrathin oxide layer with UV O3 treatment. Moreover, a bottom-gate Bi2O2Se-based field-effect transistor (FET) was constructed to research the effect of thicknesses and defects on electronic properties. The on-current/off-current (I on/I off) ratio of the Bi2O2Se FET increases with decreasing Bi2O2Se thickness and is further improved by UV O3 treatment. Eventually, the thickness-controlled Bi2O2Se FET achieves a high I on/I off ratio of 6.0 × 104 and a high field-effect mobility of 5.7 cm2 V–1 s–1. Specifically, the variation trend of the I on/I off ratio and the electronic transport properties for the bottom-gate Bi2O2Se-based FET are well described by a parallel resistor model (including bulk, channel, and defect resistance). Furthermore, the I ds–V gs hysteresis and its inversion with UV irradiation were observed. The pulsed gate and drain voltage measurements were used to extract trap time constants and analyze the formation mechanism of different hysteresis. Before UV irradiation, the origin of clockwise hysteresis is attributed to the charge trapping/detrapping of defects at the Bi2O2Se/SiO2 interface and in the Bi2O2Se bulk. After UV irradiation, the large anticlockwise hysteresis is mainly due to the tunneling between deep-level oxygen defects in SiO2 and p++-Si gate, which implies the potential in nonvolatile memory.

Defect-induced photogating effect and its modulation in ultrathin free-standing Bi2O2Se nanosheets with a visible-to-near-infrared photoresponse

“…Although annealing decreases the oxygen-to-selenium ratio (O/Se) from 3.0 to 1.5 (as obtained via elemental analysis), atmospheric exposure before the XPS measurements possibly creates an oxide layer over the NS surface, which results in the O 1s II peak in the annealed NS. 56 The additional peak centered at 532.8 eV (O 1s III) may be associated with loosely bound surface oxygen, which may be integrated during the chemical reaction process. 57 The annealing process partially removes such functional groups and, consequently, the areal intensity of O 1s III decreases from 14% (unannealed) to 7% (annealed), consistent with the STEM analysis.…”

Room temperature exciton formation and robust optical properties of CVD-grown ultrathin Bi2O2Se crystals on arbitrary substrates

“…† The contribution of O 1s (II) centered at 531.9 eV is higher on SiO 2 than sapphire. This may be partly due to the presence of Bi 2 SeO 5 , as samples were exposed to ambient air prior to the XPS measurements, 24 and partly due to the larger scan area, which might be affected by the substrate oxygen states. According to a previous study, in the case of oxide formation on the surface of Bi 2 O 2 Se, the characteristic Raman mode (A 1g ) would not be observed.…”

Ultra‐Steep‐Slope and High‐Stability of CuInP2S6/WS2 Ferroelectric Negative Capacitor Transistors by Passivation Effect and Dual‐Gate Modulation

“…The device exhibits a clear clockwise hysteresis due to the SiO 2 interface charge trap. [ 46 ] Causing by weak gate‐control ability of the bottom SiO 2 dielectric, the large gate voltages ( V BG : approximately −40 to 40 V) are applied to switch the device, exhibiting poor performance with an ON/OFF ratio of 10 5 and large SS of ≈1363 mV dec −1 .…”