Defects in Ge epitaxy in trench patterned SiO2 on Si and Ge substrates

Leonhardt, Darin; Ghosh, S. K.; Han, Sang M.

doi:10.1016/j.jcrysgro.2011.09.022

Cited by 13 publications

(15 citation statements)

References 18 publications

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“…21,23 On the other hand, Yu et al reported that defects in coalesced regions of growth fronts in Ge obtained by CVD at 600 • C were remarkably reduced by high-temperature annealing (825 • C), due to enhanced atomic reordering in the coalesced regions. 22 From these results, we speculate that atomic reordering is easily induced in the coalesced regions of growth fronts in the rapid-melting process, because the coalescence occurs at high temperatures around the solidification point of Ge (937 • C).…”

Section: Resultsmentioning

confidence: 99%

“…It is surprising that no defects are introduced in the coalesced regions, though the lattice planes are tilted by as large as ∼0.5 • , compared with the results of the vapor-phase techniques, where defects are introduced even for small tilting of ∼0.1 • . 21,23 On the other hand, Yu et al reported that defects in coalesced regions of growth fronts in Ge obtained by CVD at 600 • C were remarkably reduced by high-temperature annealing (825 • C), due to enhanced atomic reordering in the coalesced regions. 22 From these results, we speculate that atomic reordering is easily induced in the coalesced regions of growth fronts in the rapid-melting process, because the coalescence occurs at high temperatures around the solidification point of Ge (937 • C).…”

Section: Resultsmentioning

confidence: 99%

“…Thus, this ECS Journal of Solid State Science and Technology, 2 (3) P54-P57 (2013) P57 rapid-melting technique shows a significant advantage over conventional vapor and solid-phase epitaxy, where defects are introduced in the coalesced regions even for the very small tilting angle (∼0.1 • ) with a short growth distance (∼100 nm). 21,23,27…”

Section: Resultsmentioning

confidence: 99%

“…[4][5][6] Moreover, GOI structures are also useful as channel materials for advanced metal-oxide-semiconductor field-effect transistors enabling high-speed operation with low-power dissipation, because they provide high carrier mobilities, low parasitic capacitances, and low junction leakage currents. 7,8 To obtain GOI structures on a Si platform, lateral epitaxial-growth of Ge layers on Si substrates partially covered with insulating films has been intensively investigated employing liquid [9][10][11][12][13][14][15][16][17][18][19] and vaporphase [20][21][22][23] techniques. SiGe-mixing-triggered rapid-melting growth of amorphous-Ge (a-Ge) is a typical example of the liquid-phase techniques.…”

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confidence: 99%

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Atomically-Coherent-Coalescence of Two Growth-Fronts in Ge Stripes on Insulator by Rapid-Melting Lateral-Crystallization

Kurosawa

Toko

Sadoh

et al. 2012

ECS J. Solid State Sci. Technol.

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High-quality Ge-on-insulator (GOI) is a key structure for integrating high-speed transistors and optical-and spintronic-devices on Si-platform. Effects of coalescence of two growth-fronts on crystallinity of GOI-stripes during rapid-melting lateral-crystallization are investigated as a function of growth-distance. For long growth-distance (≥150 μm), grain-boundaries are generated in coalesced regions due to tilting growth-fronts (1-3 • ). On the other hand, for short distance (≤5 μm), lattice-structures coherently align without strains. Moreover, for intermediate distance (5-150 μm), lattice-structures of growth-fronts coherently align without any defects, though heterogeneous lattice-strains are locally induced due to slightly tilting growth-fronts (∼0.5 • ). Such atomically-coherentcoalescence for growth-distance <150 μm shows significant advantage of rapid-melting-crystallization over vapor and solid-phase techniques.

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Section: Resultsmentioning

confidence: 99%

Section: Resultsmentioning

confidence: 99%

Section: Resultsmentioning

confidence: 99%

mentioning

confidence: 99%

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Atomically-Coherent-Coalescence of Two Growth-Fronts in Ge Stripes on Insulator by Rapid-Melting Lateral-Crystallization

Kurosawa

Toko

Sadoh

et al. 2012

ECS J. Solid State Sci. Technol.

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“…2(c)]. 50,54 In comparison, adding an annealing step after the 3 lm Ge growth in method 4 reduces the threading dislocation density to low-10 7 cm À2 level and confines the dislocations to within 200 nm of the Ge-Si interface [ Fig. 2(d)].…”

Section: A Comparison Of Growth Methodsmentioning

confidence: 99%

Empirical correlation for minority carrier lifetime to defect density profile in germanium on silicon grown by nanoscale interfacial engineering

Sheng

Leonhardt

Han

et al. 2013

Journal of Vacuum Science &Amp; Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phen

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High-quality Ge-on-Si heterostructures have been explored for many applications, including near infrared photodetectors and integration with III–V films for multijunction photovoltaics. However, the lattice mismatch between Ge and Si often leads to a high density of defects. Introducing annealing steps prior to and after full Ge island coalescence is found to reduce the defect density. The defect density in Ge is also found to decrease with increasing dopant density in Si substrates, likely due to the defect pinning near the Ge-Si interface by dopants. The authors establish an empirical correlation between the minority carrier lifetime (τG) and the defect density in the Ge film (ρD) as a function of distance from the Ge-Si interface: τGe = C/ρD, where C is a proportionality constant and a fitting parameter which is determined to be 0.17 and 0.22 s/cm2 for Ge films grown on low-doped, high-resistivity Si substrates and high-doped, low-resistivity Si substrates, respectively. The effective minority carrier lifetime measured as a function of Ge film thickness is then related to the recombination velocity on Ge film surface, average minority carrier lifetime within Ge film, and recombination velocity at the Ge-Si interface. Using this relation, the authors estimate the Ge-Si interface recombination velocity for Ge films grown on low-doped, high-resistivity and high-doped, low-resistivity Si substrates to be 220 and 100 cm/s, respectively.

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