2015
DOI: 10.1063/1.4905487
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Defects reduction of Ge epitaxial film in a germanium-on-insulator wafer by annealing in oxygen ambient

Abstract: A method to remove the misfit dislocations and reduce the threading dislocations density (TDD) in the germanium (Ge) epilayer growth on a silicon (Si) substrate is presented. The Ge epitaxial film is grown directly on the Si (001) donor wafer using a “three-step growth” approach in a reduced pressure chemical vapour deposition. The Ge epilayer is then bonded and transferred to another Si (001) handle wafer to form a germanium-on-insulator (GOI) substrate. The misfit dislocations, which are initially hidden alo… Show more

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Cited by 50 publications
(36 citation statements)
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“…Actually, in conventional SOI fabrication, a high temperature annealing process is always conducted to cure the defects in Si layer [20]. Furthermore, high temperature annealing has also shown great effectiveness to reduce the dislocations in a GOI wafer fabricated by transferring a Ge epitaxial film grown on a Si substrate [21,22]. Thus, we have investigated the thermal annealing impact on the crystal quality of the Ge layer on the GOI substrate fabricated by Ge bulk wafer bonding and ioncutting.…”
Section: Effect Of Thermal Annealing On Ge-on-insulatormentioning
confidence: 99%
“…Actually, in conventional SOI fabrication, a high temperature annealing process is always conducted to cure the defects in Si layer [20]. Furthermore, high temperature annealing has also shown great effectiveness to reduce the dislocations in a GOI wafer fabricated by transferring a Ge epitaxial film grown on a Si substrate [21,22]. Thus, we have investigated the thermal annealing impact on the crystal quality of the Ge layer on the GOI substrate fabricated by Ge bulk wafer bonding and ioncutting.…”
Section: Effect Of Thermal Annealing On Ge-on-insulatormentioning
confidence: 99%
“…The detailed fabrication process is discussed in Supplementary section S1. The bonding and layer transfer approach could facilitate a scalable Ge-OI fabrication to any wafer diameter and Ge thickness, with a superior Ge quality than that from the direct Ge-on-Si epitaxy 46 . Its low process thermal budget (~300 ºC) enables a back-end-of-line electronic-photonic integration.…”
Section: Recessed Sin X Stressor For Enhanced and Uniform Mechanical mentioning
confidence: 99%
“…To minimize the effect of the lattice mismatch, our group has successfully demonstrated the direct epitaxial growth of Ge-on-Si (Ge/Si) with a TDD of ∼5 × 10 6 cm −2 [9,10].…”
Section: Introductionmentioning
confidence: 99%