Demonstration of an 8×8-bit RSFQ multi-port register file

Abstract

As a part of the 8-bit RSFQ processor datapath development, we have designed, fabricated, and experimentally demonstrated an 8x8-bit RSFQ multi-port register file. The register file provides input data operands and stores Arithmetic Logic Unit (ALU) results. It can perform two simultaneous nondestructive "read" operations and one "write" operation and is capable of storing eight 8-bit words. The distinct feature of the design is an extensive use of passive transmission lines (PTLs) for very complex interconnects inside the register file. The register file is designed for integration with recently demonstrated 20-GHz 8-bit RSFQ ALU. It is fabricated with the standard HYPRES's 1.0-um 4.5-kA/cm 2 process. The circuit is placed on a 1 cm x 1 cm chip and consists of ~4,000 Josephson junctions.

High-Density Shift-Register-Based Rapid Single-Flux-Quantum Memory System for Bit-Serial Microprocessors

“…Several types of the local storage component, such as register file and small-capacity memory, have been demonstrated [6]- [10] or designed [11]. Shift-register-based storage [12] is considered to be the most convenient option for RSFQ bit-serial microprocessors because it is dc biased, capable of operating at a clock frequency exceeding several tens of gigahertz, and composed of serially connected D flip-flops that are very suitable for implementation with RSFQ circuits, whereas much higher bandwidth is achieved by using bitparallel processing [10], [11].…”

“…Shift-register-based storage [12] is considered to be the most convenient option for RSFQ bit-serial microprocessors because it is dc biased, capable of operating at a clock frequency exceeding several tens of gigahertz, and composed of serially connected D flip-flops that are very suitable for implementation with RSFQ circuits, whereas much higher bandwidth is achieved by using bitparallel processing [10], [11]. An ultimately efficient implementation of the shift register was demonstrated, in which only two Josephson junctions were used to realize each bit [13].…”