Alternative Lithographic Technologies 2009
DOI: 10.1117/12.814436
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Demonstration of full-field patterning of 32 nm test chips using EUVL

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Cited by 9 publications
(5 citation statements)
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“…[1][2][3][4] While the theoretical limitations to the RLS trade-off have been well documented, 5,6 this work has all been done at constant film thicknesses. An additional aspect of the RLS trade-off exists that has not been accounted for in these theoretical treatments: as resolution improves, the thickness of resists must concomitantly decrease to prevent line collapse.…”
Section: Introduction 11 Thin-film Ler Problemmentioning
confidence: 99%
“…[1][2][3][4] While the theoretical limitations to the RLS trade-off have been well documented, 5,6 this work has all been done at constant film thicknesses. An additional aspect of the RLS trade-off exists that has not been accounted for in these theoretical treatments: as resolution improves, the thickness of resists must concomitantly decrease to prevent line collapse.…”
Section: Introduction 11 Thin-film Ler Problemmentioning
confidence: 99%
“…We also collaborate with Intel on the area of full field exposure evaluation [4,8]. Figure 5 shows excellent static exposure results down to 26nm hp with conventional illumination condition.…”
Section: Euv1 Tool Statusmentioning
confidence: 96%
“…[2][3] Recent works in EUV photoresist development has highlighted that substrate materials play a critical role in affecting imaging performance and can improve LER, resolution, and process window. [4][5] In this paper, LER evolution along the resist sidewalls of ultra-thin film EUV resists is studied. It was previously reported by Foucher that LER both increases and becomes less isotropic as the resist sidewall approaches the substrate interface.…”
Section: Introductionmentioning
confidence: 99%