Dense, performance directed, auto place and route

Rose, Marc A.; Wiesel, M.; Kirkpatrick, Desmond A.; Nettleton, N.

doi:10.1109/cicc.1988.20843

Cited by 20 publications

(4 citation statements)

References 4 publications

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“…To get better routing results for timing optimization, we also need efficient timing-driven global routing algorithms. Some typical timing-driven global routing algorithms [3,[11][12][13][14][15][16] have been presented.…”

Section: Introductionmentioning

confidence: 99%

“…[11] proposes the nets-based timing analysis strategy to improve the timing performance. This strategy has advantages compared with previous methods: (1) simply transform the minimum interconnect delay into the minimum wire length [12,13] and (2) assign higher priorities to more critical nets by static delay analysis and then obtain shorter routes for each net [14,15]. This approach is easy to implement and simple to control.…”

Section: Introductionmentioning

confidence: 99%

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Utaco

Tong

Hong

Bao

et al. 2003

Proceedings of the 2003 Conference on Asia South Pacific Design Automation - ASPDAC

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Timing performance and routability are two main issues of global routing. In this paper, we adopt a shadow price mechanism to incorporate the two issues into one unified objective function. The shadow price of a net is the sum of its congestion price and timing price. Based on the new formulation, this paper presents the UTACO algorithm for standard cell (SC) global routing. The experimental results show that UTACO is efficient for both timing and congestion optimization.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Utaco

Tong

Hong

Bao

et al. 2003

Proceedings of the 2003 Conference on Asia South Pacific Design Automation - ASPDAC

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“…Both of these techniques save area. For information on back-to-back rows and cell overlap, see[5].Back-to-back rows and cell overlap illustrates a simple standard cell for the routing system. The standard cells include VSS Metall lines on the bottom, but no VCC Metall lines.…”

mentioning

confidence: 99%

Synthesis for high performance random logic layout

Rose

Papakonstantinou

Wellington

et al.

IEEE International Symposium on Circuits and Systems

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This paper describes techniques used by Intel's standard cell place and route system to achieve dense, high performance results. The system uses a two-step approach to achieve high performance: first reduce the average path length by producing a dense result, then adjust the result to reduce delay on the slowest paths. The performance improvement process involves interaction between the layout tool and some of Intel's performance verification tools.

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“…Previous works [3][4][5][6] have various contributions to performance-driven global routing based on conventional interconnect delay metrics [7,8]. These algorithms are straightforward and efficient regarding specific test cases.…”

Section: Introductionmentioning

confidence: 99%

A coupling and crosstalk considered timing-driven global routing algorithm for high performance circuit design

Xu¹,

Hong²,

Tong³

et al.

ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753)

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-With the exponential reduction in scaling of feature size, inter-wire coupling capacitance becomes the dominant part of load capacitance. Two problems are introduced by coupling, delay deterioration and crosstalk. This paper presents a timing-driven global routing algorithm with consideration of coupling effects and crosstalk avoidance. Our work differs from the existing ones in that we design a global routing "framework" which performs well in routablity, timing, and also facilitate the detailed routing in crosstalk avoidance. Experimental results on industrial circuits show that, the algorithm leads to substantial delay reduction and effective crosstalk elimination.

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Dense, performance directed, auto place and route

Cited by 20 publications

References 4 publications

Utaco

Utaco

Synthesis for high performance random logic layout

A coupling and crosstalk considered timing-driven global routing algorithm for high performance circuit design

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