In order to integrate superconducting qubits with rapid-single-flux-quantum (RSFQ) control circuitry, it is necessary to develop a fabrication process that fulfills at the same time the requirements of both elements: low critical current density, very low operating temperature (tens of milliKelvin) and reduced dissipation on the qubit side; high operation frequency, large stability margins, low dissipated power on the RSFQ side. For this purpose, VTT has developed a fabrication process based on Nb trilayer technology, which allows the on-chip integration of superconducting qubits and RSFQ circuits even at very low temperature. Here we present the characterization (at 4.2 K) of the process from the point of view of the Josephson devices and show that they are suitable to build integrated superconducting qubits. Characterization of a fabrication process for the integration of qubits and RSFQ circuits 2
IntroductionOn the way towards a reliable and scalable quantum computer, superconducting qubits are promising candidates that are being developed worldwide [1]. To achieve the requested performance on-chip control and readout is of the utmost importance. A viable solution is rapidsingle-flux-quantum (RSFQ) logic, the most advanced superconducting digital technology, which is based on overdamped Josephson junctions [2].Ideally, the qubits must operate at very low temperature, in an environment with low dissipation to preserve the coherent behaviour, with control and readout circuit placed as close as possible, preferably integrated on-chip. These requirements are fulfilled by single-flux-quantum digital circuits, which are fast, scalable, require a very low power and share the same fabrication technology of at least some of the qubits (e.g. phase qubits, based on Josephson junctions, and flux qubits, based on Josephson interferometers).RSFQ logic has been investigated during many years, yielding to the development of complex circuits [3], optimized however for a range of temperatures and critical current densities different from those useful for qubits. Besides, at very low temperature the tolerable dissipated power is severely limited by the low refrigerating power of dilution refrigerators close to the base temperature. As a result, building an on-chip RSFQ circuit to control and read out qubits requires a new optimization procedure, a new design of the layout and a new fabrication process.Recently, a process satisfying these requirements has been developed by VTT. In the process, electron thermalization of the RSFQ part is improved by the use of copper cooling fins. To minimize dissipation, a target critical current density as low as 30 A/cm 2 is used. Here we characterize the process from the point of view of the Josephson junctions; measurements carried out at 4.2 K assess the good quality of unshunted junctions and their potential to build qubits.