Design and Analysis of a 4.2 mW 4 K 6–8 GHz CMOS LNA for Superconducting Qubit Readout

Çağlar, Alican; Winckel, S. Van; Brebels, S.; Wambacq, Piet; Craninckx, Jan

doi:10.1109/jssc.2022.3219060

Cited by 13 publications

(2 citation statements)

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“…Several cryo-CMOS amplifiers targeting the ∼4-8 GHz frequency range have recently been reported (see [9], [10], [11], [12], and [13]). Of these results, the amplifiers whose power consumption was close to that required for superconducting quantum computing had noise temperatures (T e ) an order of magnitude too high for this application.…”

Section: Introductionmentioning

confidence: 99%

“…Of these results, the amplifiers whose power consumption was close to that required for superconducting quantum computing had noise temperatures (T e ) an order of magnitude too high for this application. For instance, the high-gain amplifier reported in [11] dissipated just 4.2 mW but had an average T e = 39 K from 6 to 8 GHz. On the other hand, amplifiers whose T e was closer to that required for this application dissipated over an order of magnitude too much power.…”

Section: Introductionmentioning

confidence: 99%

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A 4-to-6-GHz Cryogenic CMOS LNA With 4.4-K Average Noise Temperature in 22-nm FDSOI

Das,

Raman,

Bardin

2024

IEEE Microw. Wireless Tech. Lett.

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Integrated readout systems are desired to enable future large-scale superconducting quantum computers. These systems require high-performance cryogenic low-noise amplifiers, and implementing these in CMOS is desirable from an integration point of view. However, realizing the necessary noise and power performance required for this application while using CMOS is an open challenge. Here, we present the design of a cryogenic low-noise amplifier (LNA) in 22-nm fully depleted silicon on insulator (FDSOI) technology. Operating between 4 and 6 GHz and consuming 15.8 mW, it achieved a peak gain of 38 dB, a minimum noise of 3.5 K at 5.2 GHz, and an average noise of 4.4 K. Through back-gate control and bias optimization, it can be operated at a lower supply voltage while dissipating <4.5 mW at the expense of 0.7-K higher noise. Considering a figure of merit (FOM), which takes into account the number of added noise photons, gain, bandwidth, and power consumption, the LNA, biased at low power, demonstrates an FOM of >3× higher than other state-of-the-art cryogenic CMOS (cryo-CMOS) LNAs. To the best of our knowledge, this is the first report of a cryo-CMOS LNA operating above 4 GHz that exhibits a noise temperature below 4 K.

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