Design and characteristics of the lightly doped drain-source (LDD) insulated gate field-effect transistor

Formation of Ultra-Shallow Junctions

“…For many years, hot-carrier effects were mitigated by means of low-doped drain (LDD) regions (Ogura et al, 1980) that were positioned between the channel and the main part of the drain. The idea was to create a more gradual voltage drop near the drain.…”

Leakage Current Reduction Using 350-nm Ultra-Violet Irradiation in P-Channel Polycrystalline-Silicon Thin-Film Transistors

“…Previously, Ogura et al proposed that lightlydoped drain (LDD) structure, without eliminating the grain boundary effects, is able to suppress GIDL current by lowering the electric field near the drain junction. Although the electrical field is effectively lowered by LDD, the additional process steps and the design of the LDD structure are still issued [13]. Han trical stress method also requires extra process steps for interconnection of gate and drain in a large TFT array, and the critical stress condition varies with each device [14].…”

Evaluation of LDD MOSFET's based on hot-electron-induced degradation

“…Among these structures, the lightly doped drain (LDD) structure offers the widest design freedom and has been studied and evaluated by many authors [4] - [7]. The full evaluation of LDD MOSFET, however, is a very complicated issue mainly because there are many different parameters involved.…”

“…The full evaluation of LDD MOSFET, however, is a very complicated issue mainly because there are many different parameters involved. Through reduced channel electric field, the LDD structure has been demonstrated to greatly reduce the substrate, gate, and minority currents, and increase the source-drain breakdown voltage [4] - [7] . The structure also offers smaller gate-to-drain/source overlap capacitance which helps…”