The temperature dependence of MOSFET degradation due to hot-electron injection has been studied. The slower degradation rate at elevated temperature at fixed stressing bias follows the substrate current level which is reduced mainly by lower localized electric field rather than lower ionization coefficient (both are caused by enhanced phonon scattering). The actual degradation rate at the constant substrate current level is slightly higher at elevated temperatures, indicating an enhanced interface-state generation mechanism. This temperature dependence provides a simple relationship between device degradation and substrate current at various temperatures.

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A new scneme for SWAMI (Side fll1 Masked -Isolation) process is presented which takes full advantage o f LOCOS processing w i t h o u t suffering the difficulties.The new SWAMI technology incorporates a sloped silicon sidewall and thin nitride around the i s l a n d sidewalls such t h a t b o t h i n t r i n s i c n i t r i d e s t r e s s and volume expansion induced stress are greatly reduced. A defect free and near-zero bird's beak local oxidation process can be realized by the SWAMI. Fabrication technology and MOSFET electrical characteristics will be discussed. A SWAWI/CMOS circuit including 60K ROM, 2.5K SRAM, and 100 segments o f display driver w i t h 5.13 x 5.22 m2 chip size has been successfully fabricated.The results indicate that the SWAMI i s capable o f replacing the LOCOS as the isolation technology for scaled VLSI circuit fabrication.

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