TiSi<sub>2</sub>thickness limitations for use with shallow junctions and SWAMI or LOCOS isolation

Chen, D.C.; Cass, Tony; Turner, J. E.; Merchant, Paul; Chiu, K.Y.

doi:10.1109/t-ed.1986.22695

Cited by 22 publications

(8 citation statements)

References 7 publications

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“…9. For concurrently formed silicides and junctions, where a high annealing temperature is required, the majority of the remaining dopant (80-90% for both boron and arsenic) winds up in the silicide.…”

Section: Discussionmentioning

confidence: 99%

“…This paper focuses on the conventional process plus one variant in which the metal reaction to form a silicide is done concurrently with the junction annealing step (5-8, 39, 43). In the extreme case where the metal consumes too much silicon or is improperly formed (1, [8][9][10][11]40), the junction can become leaky or shorted. In the extreme case where the metal consumes too much silicon or is improperly formed (1, [8][9][10][11]40), the junction can become leaky or shorted.…”

mentioning

confidence: 99%

“…One important limitation of the SALICIDE process is that the metal-silicon reaction consumes the junction region. In the extreme case where the metal consumes too much silicon or is improperly formed (1, [8][9][10][11]40), the junction can become leaky or shorted. In the more typical case, the silicide growth consumes only about half of the junction.…”

mentioning

confidence: 99%

“…The presence of dopants in the silicon have been reported to impact silicide growth kinetics (9-11, 13, 14, 18, 20, 21, 26-28, 33, 44), lateral overgrowth (26), and the tern-perature dependence of the silicide resistivity (27): Conversely, the presence of the silicide has an impact on the doping profile (5-10, 13, 14, 16-22, 32, 37, 38, 42-44), dopant loss (6,8,13,22,37,44), contact resistance (9,38), diode leakage (5, 9-12, 24, 38, 40), breakdown (26), and damage removal (7,30,31). Silicides on top of poly-Si (polycrystalline-silicon) gate electrodes create additional problems associated with dopant loss from the poly-Si and resulting changes in work function, etch rate, and resistance (6,22,29,42,44,45).…”

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confidence: 99%

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The Effects of Titanium Silicide Formation on Dopant Redistribution

Osburn

Brat

Sharma

et al. 1988

J. Electrochem. Soc.

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This paper reports on boron and arsenic redistribution during the TiSi2 self-aligned silicide process as applied to shallow (<0.2 ~tm) junctions. Dopant loss was seen to occur through evaporation from the silicide surface, segregation into the Ti-rich outer layer which is subsequently removed, and diffusion into the silicide layer. Depending on the silicide and junction annealing temperatures, up to 99% of the implanted dopant dose can be lost via these three mechanisms. Dopant loss is particularly acute when the silicide is formed concurrently with recrystallization/annealing of the junction implant, before the dopant diffuses into the silicon. Germanium preamorphization, to eliminate channeling of the ion implanted dopants, further aggravates the loss of boron but has a slightly beneficial effect with arsenic. Oxide capping of the silicide before annealing reduces dopant evaporation and increases the dopant concentration at the silicide contact, but at the expense of increased junction depth. ) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 155.69.4.4 Downloaded on 2015-06-04 to IP

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Section: Discussionmentioning

confidence: 99%

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The Effects of Titanium Silicide Formation on Dopant Redistribution

Osburn

Brat

Sharma

et al. 1988

J. Electrochem. Soc.

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“…Table 1 summarizes the model parameters for the Ti%-related process simulation. These were obtained by fitting to many experimental data in literatures [4][5][6][7][8].…”

Section: Process Simulationmentioning

confidence: 99%

Impact of drain profiles on Ti-salicided pMOSFET characteristics analyzed by a first comprehensive coupled process/device simulator for salicided MOSFETs

Kai

Sakakura

Fukuda

et al.

Proceedings of IEEE International Electron Devices Meeting

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This paper reports a two-dimensional coupled process/device simulation of salicided MOSFETs for the first time. Process simulation results are in good agreement with the experiments. The device structure by the process simulation is precisely reflected to device simulation. Nonlinear current-voltage characteristics at the silicide/Si interface is included in the analysis and show good agreement with the experiments. Impact of a drain profile on a current distribution of Ti-salicided pMOSFETs is discussed.

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Formation of Germanides by Rapid Thermal Annealing and their Applications in Advanced Mosfet Processes

Ashburn

Öztürk

1992

Crucial Issues in Semiconductor Materials and Processing Technologies

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TiSi₂thickness limitations for use with shallow junctions and SWAMI or LOCOS isolation

Cited by 22 publications

References 7 publications

The Effects of Titanium Silicide Formation on Dopant Redistribution

The Effects of Titanium Silicide Formation on Dopant Redistribution

Impact of drain profiles on Ti-salicided pMOSFET characteristics analyzed by a first comprehensive coupled process/device simulator for salicided MOSFETs

Formation of Germanides by Rapid Thermal Annealing and their Applications in Advanced Mosfet Processes

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TiSi2thickness limitations for use with shallow junctions and SWAMI or LOCOS isolation

Cited by 22 publications

References 7 publications

The Effects of Titanium Silicide Formation on Dopant Redistribution

The Effects of Titanium Silicide Formation on Dopant Redistribution

Impact of drain profiles on Ti-salicided pMOSFET characteristics analyzed by a first comprehensive coupled process/device simulator for salicided MOSFETs

Formation of Germanides by Rapid Thermal Annealing and their Applications in Advanced Mosfet Processes

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TiSi₂thickness limitations for use with shallow junctions and SWAMI or LOCOS isolation