The research paper ventures a novel modelling strategy of finite gain and noise of an electrocardiogram (ECG) amplifier at 0.18, 0.5 and 0.9 micron standard CMOS technologies respectively. An active comb filter is used to design the amplifier for removing the selected frequencies of numerous signals. The presented filter is configured with only Operational Transconductance Amplifiers (OTAs) and capacitors that makes it apt for implementation of monolithic integrated circuits (ICs). The relevance of this analog circuit is verified for a suitable test signal of 60 Hz as in the ECG signal. Using Cadence Virtuoso analog design environment, the effect of transistor channel length and width is examined for analysis of noise and bandwidth. It is observed that the performance in terms of noise and gain considerably increases for advanced technology node. However, for a suitable supply of bias current, a portable ECG system can also provide an improved bandwidth performance of advanced CMOS technology