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Road identification from high-precision images is important to programmed mapping, urban planning, and updating geographic information system (GIS) databases. Manual identification of roads is slow, costly, and prone to errors. Therefore, it is a hot topic among remote sensing experts to develop programmed techniques for road identification from satellite images. The main challenge lies in the variation of width and surface contents between roads. This paper presents a road identification and extraction strategy for satellite images. The strategy, denoted as ESMIRMO, recognizes roads in satellite images through edge segmentation, using morphological operations. Specifically, morphological operations were employed to enhance the quality of the original image, laying a good basis for accurate road detection. Next, edge segmentation was adopted to detect the road in the original image accurately. After that, the proposed strategy was compared with traditional methods. The comparison shows that our strategy could identify roads from satellite images more accurately than traditional methods, and overcome many of their limitations. Overall, our strategy manages to enhance the quality of satellite images, pinpoint roads in the enhanced images, and provide drivers and repairers with real-time information on road conditions.

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By using two resistors and a single capacitor with second-generation differential current conveyor as an active element, a new square wave generator is proposed and implemented. The frequency of operation of the introduced model is varied with respect to the variation of remaining passive components. Maximum reduction in noise effects caused by parasitics generated during integrated circuit fabrication is achieved with the scheme of grounded capacitor. The mathematical model of the selected circuit is verified in both simulation and experimental mode and found having matched in all three aspects. The elevated advantages and merits of the given topology are compared and tabulated contrary to the existing standard models. Using Cadence virtuoso with gpdk 180 nm libraries, the circuit is verified with a supply rail voltage of ±2.5 V. Later, prototype is also tested with commercially available current feedback operational amplifiers of AD844AN.

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