Design and Performance Evaluation of Energy Efficient 8-Bit ALU at Ultra-Low Supply Voltages Using FinFET with 20 nm Technology

Vijay, Vallabhuni; Shekar, Pittala Chandra; Shaik, Sadulla; Manoja, Putta; Abhinaya, Rallabhandy; Rachana, Merugu; Nikhil, Nakka

doi:10.1201/9781003277538-4

Cited by 16 publications

(19 citation statements)

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“…Due to their higher threshold voltage, previously known methods cannot be operated at low voltages. [32][33][34][35][36][37][38][39] This tells us that the previously known and current known methodologies had a significant drawback which creates the need to invent new methodologies to make the circuit more efficient. It is also known that the static leakage current is also more in existing and previously known methodologies.…”

Section: Significant Drawbacks In the Existed Methodsmentioning

confidence: 99%

ADC: Novel Methodology for Code Converter Application for Data Processing

2023

VLSI

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An innovative "Multiplexer based Thermometer to Binary code encoder" is presented in this paper. This paper shows a relative decrease in the total count of multiplexers used which eventually reduces the no of transistors used when compared to traditional Architectures. The requirement for further more inverters is also eliminated in the proposed model. The input thermometer code is at first is converted to the respective gray code with the help of 2:1 multiplexer. Thereafter, using two-input XOR gates the conversion process of gray code to respective binary codes takes place. Outcomes of simulation reveal that there is an approximately 80% decrease in the power consumption which is a great reduction actually when differentiated with previously known and current encoder architectures with the delay being reduced from 0.472ps to 0.366 ps. This throws a light on modern power-saving encoder architectures and has a greater significance in the future. The proposed encoder gives a better application for future generation advanced ADC & related circuits.

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Section: Significant Drawbacks In the Existed Methodsmentioning

confidence: 99%

ADC: Novel Methodology for Code Converter Application for Data Processing

2023

VLSI

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“…Hence, there is drift in transistor manufacture from CMOS to FinFET technology. [27][28][29][30][31][32][33][34][35][36][37][38][39][40]…”

Section: Finfet Characteristics and Modellingmentioning

confidence: 99%

“…[11] To improve this architecture, its analysis is carried out using FinFET technology through this paper. [30][31][32][33][34][35][36][37][38][39]…”

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confidence: 99%

Data Conversion: Realization of Code converter using Shift Register Modules

2023

VLSI

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Barrel shifter architecture is well known for bit manipulation in a single clock cycle. Due to its various operations and advantages, it is most likely used in the Arithmetic logic unit of every processor. Gray code is also known as reflective code which is widely used in digital communication for the purpose of error correction and error detection. In this project, an 8 x 4 barrel shifter is designed which is further connected to 4-bit binary to gray code converter. The barrel shifter is cascaded with binary to gray code converter so that this combination can be useful for the application of encryption of binary data in digital communications. It is designed in cadence virtuoso tool using FinFET technology at 18 nm node. The simulation results proves that the power consumed by the proposed design with FinFET technology is 11.92% less when compared with the conventional design with MOS transistors. Hence, this design can be used in application of low power digital communications. The functionality testing and verification is done using cadence virtuoso tool.

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“…The following next years, transistors are likely to get reduced to some nanometers and further diminish of the transistors are practically impossible. [23]- [35] The advantages of FinFETs are higher technological, maturity than planar DG, suppressed short channel effect, better in driving current, more compact and low cost. Applications of FinFETs are plausibility to spare power emerges when the two gates can be controlled independently, and at long last separate access to the two gates could likewise be utilized to configuration rearranged rationale gates.…”

Section: Finfet Characteristics and Modelingmentioning

confidence: 99%

Flip-Flop Realization: Conventional Memory Elements Design with Transistor Nodes

2023

VLSI

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In the ultra-low-power implementation, center circuits of numerous frameworks are activated by inadequate occasions, for example, the Internet of Things (IoT) sensors and implantable clinical consideration. To guarantee that, the sensors get each and every occasion showing up whenever the circuits operate in standby mode the most of the time. Under such conditions, static power dominates in the total power consumption. For these implementations, the lessening framework leakage current can straightforwardly accomplish the greatest effectiveness of the complete framework power utilization. Since the SRAM cluster takes up a bigger bit of the circuit, it is important to decrease the power utilization of the SRAM exhibit so as to lessen circuit all-out power. Band-to-band tunneling (BTBT) mechanism introduced silicon tunnel FET (TFET), MOSFET compatible fabrication process and ultra-steep SS, which can break the 60mV/dec limitation of MOSFET at room temperature and ultralow off-state current. Subsequently, it is required to be a promising contender for an ultra-low-power rationale circuit. The impact of forward p-I-n leakage current could prompt harm to the static noise margin (SNM), static power and power defer result of the SRAM circuit. So the proposed topology can stay away from the p-I-n intersection, by expanding SRAM cell read and hold static noise margin (SNM) and diminishing static power utilization drastically.

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Design and Performance Evaluation of Energy Efficient 8-Bit ALU at Ultra-Low Supply Voltages Using FinFET with 20 nm Technology

Cited by 16 publications

References 0 publications

ADC: Novel Methodology for Code Converter Application for Data Processing

ADC: Novel Methodology for Code Converter Application for Data Processing

Data Conversion: Realization of Code converter using Shift Register Modules

Flip-Flop Realization: Conventional Memory Elements Design with Transistor Nodes

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