Design and investigation of a triple boost multilevel inverter with self‐balanced switched capacitors and reduced voltage stress

Abstract

Multilevel inverters (MLI) play a key role in various medium voltage and high power industrial applications. This paper proposes a triple boost multilevel inverter (TBMLI) comprising switched capacitors. The special features of the proposed circuit are three times boosted output voltage, reduced voltage stress on switches, and the presence of a single dc source. Moreover, the self‐balancing in the capacitors voltage which eliminates the need of auxiliary control circuitry and reduced number of overall components also add to the salient qualities of proposed MLI. The simulation has been done using MATLAB/Simulink, whereas the loss analysis, describing the distribution of the various power loss, has been completed with the help of PLECS software. The proposed topology has a maximum efficiency of 98.3%, whereas the THD in output voltage is 13.65%. The proposed MLI is experimentally investigated to see its performance. A comparison has been conducted to assess the proposed MLI on various parameters.

A novel step‐up topology for multilevel power conversion

“…As evident from Table 4, the seven-level topologies [13][14][15] required low Ns but had a gain of 1.5 for previous works 13,14 and a gain of 3 for Sarwer et al. 15 As having a high gain in the seven-level inverter, 15 TSV increases resultant CF is high.…”

“…As evident from Table 4, the seven-level topologies [13][14][15] required low Ns but had a gain of 1.5 for previous works 13,14 and a gain of 3 for Sarwer et al. 15 As having a high gain in the seven-level inverter, 15 TSV increases resultant CF is high. Topologies [16][17][18][19][20] are operated as nine-level where the Jagabar Sathik et al 16 required a low number of all parameters but required two input sources resulting in high CF.…”

“…Proposed SC-MLI worked in an asymmetric charging state and uses only three capacitors. The topologies [13][14][15][16][17][18][19][20][21][22][23][24][25][26][27][28][29] generate different voltage levels and use single or multiple DC sources. Topologies [13][14][15] are operated with seven-level, where previous works 13,14 have the gain of 1.5.…”

“…The topologies [13][14][15][16][17][18][19][20][21][22][23][24][25][26][27][28][29] generate different voltage levels and use single or multiple DC sources. Topologies [13][14][15] are operated with seven-level, where previous works 13,14 have the gain of 1.5. The gain for Sarwer et al 15 is 3, but this topology required a high number of switches.…”

“…Topologies [13][14][15] are operated with seven-level, where previous works 13,14 have the gain of 1.5. The gain for Sarwer et al 15 is 3, but this topology required a high number of switches. Topologies [16][17][18][19][20] are operated as nine-level inverters where only Jagabar Sathik et al 16 has high voltage gain of 3 while others have a voltage gain of 2.…”