Design and linearity analysis of current bleeding CMOS mixer for GPS application

Li, Jin; Cheng, Zhiqun; Fu, Kaihong; Zhou, Xiaopeng; Zhou, Yunfang

doi:10.1109/icct.2008.4716261

Cited by 4 publications

(1 citation statement)

References 3 publications

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“…In Equations ( 2)-( 6), g m is the transconductance of M1, g d0 is the zero bias drain conductance, is the channel current noise factor, ı is the gate induced current noise factor, c is the correlation coefficient. Equation (5) gives the optimum source impedance for noise match. In order to achieve power match and noise match simultaneously, there should be Z opt D Z s…”

Section: Low Power Low Noise Amplifier Designmentioning

confidence: 99%

An ISM 2.4 GHz low power low-IF RF receiver front-end

Chen

et al. 2015

J. Semicond.

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This paper describes the implementation of an RF receiver front-end for the 2.4 GHz industrial scientific medical band under TSMC 0.13 μm CMOS technology; it comprises a low noise amplifier (LNA) which uses an added gate–source capacitor for low power performance and a dual-converter composed of a single-balanced active RF mixer and double-balanced passive IF mixer. Dual-down-conversion technique is used for reducing power. A 2.4 GHz low power low-IF RF receiver front-end is proposed. An LNA for rejecting image signal, an inductor–capacitor (LC) tank is used in series with source of input-stage transistor of the RF mixer, and combined with the LC load of the LNA, 30-dB image rejection is realized. Fabricated in a 0.13 μm CMOS process, the proposed chip occupies 0.42 mm2 area, achieves 4 dB noise figure, −22 dBm IIP3 and 37 dB voltage gain dissipating only 4.2-mW under 1.2-V supply.

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Section: Low Power Low Noise Amplifier Designmentioning

confidence: 99%