Design and Optimization of an HSDPA Turbo Decoder ASIC

Benkeser, Christian; Burg, Andreas; Cupaiuolo, Teo; Huang, Qiuting

doi:10.1109/jssc.2008.2007166

Cited by 60 publications

(51 citation statements)

References 17 publications

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“…This can therefore result in a slow down of a circuit's operation, if one part has to wait for a pipelined calculation to become available. Figure 12 shows an example of pipelining in the turbo decoder of [51], which uses a similar decoder core to that proposed by the authors of [46], [49]. High-throughput turbo decoders, such as those proposed by [49], [52], [53], typically employ a multitude of these cores in parallel.…”

Section: A Data Path Considerationsmentioning

confidence: 99%

“…This motivates the employment of a technique known as extrinsic LLR scaling, which is capable of mitigating some of this performance loss [46], [63]. Figure 15 compares the error correction performance of the Log-BCJR, LUT-Log-BCJR, Max-Log-BCJR and Maximum with Scaled Extrinsic Log-BCJR (Max-SE-Log-BCJR) decoders.…”

Section: B Algorithm Controlmentioning

confidence: 99%

“…Extrinsic LLR scaling is also used in the Max-Log-BCJR architecture of [46], resulting in a 45% reduction in area and a 50% improvement in throughput, when compared to a similar architecture, which uses the LUT-Log-BCJR algorithm instead. The reduction in the number of logic gates required for the max * calculation also results in a reduced EC.…”

Section: B Algorithm Controlmentioning

confidence: 99%

“…• Early Stopping [46], [53], which terminates the turbo decoding process early, if the correct bit-stream is unlikely to be found, thus saving energy. This technique considers the values of the LLRs, and detects if their quality no longer improves in successive decoding iterations, indicating that the remaining errors in the message will not be corrected.…”

Section: B Algorithm Controlmentioning

confidence: 99%

“…• Modulo normalization [46], [51], which allows the state metrics to overflow, relying on the nature of the two's complement arithmetic to correct this overflow, instead of requiring a larger number of bits to represent these metrics. An additional logic gate is required for the max logic, in order to allow it to correctly process numbers, which have experienced an overflow.…”

Section: B Algorithm Controlmentioning

confidence: 99%

See 4 more Smart Citations

20 Years of Turbo Coding and Energy-Aware Design Guidelines for Energy-Constrained Wireless Applications

Brejza

Maunder

et al. 2016

IEEE Commun. Surv. Tutorials

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Abstract-During the last two decades, wireless communication has been revolutionized by near-capacity Error-Correcting Codes (ECCs), such as Turbo Codes (TCs), which offer a lower Bit Error Ratio (BER) than their predecessors, without requiring an increased transmission Energy Consumption (EC). Hence, TCs have found widespread employment in spectrum-constrained wireless communication applications, such as cellular telephony, Wireless Local Area Network (WLAN) and broadcast systems. Recently however, TCs have also been considered for energyconstrained wireless communication applications, such as Wireless Sensor Networks (WSNs) and the 'Internet of Things' (IoT). In these applications, TCs may also be employed for reducing the required transmission EC, instead of improving the BER. However, TCs have relatively high computational complexities and hence the associated signal-processing-related ECs are not insignificant. Therefore, when parameterizing TCs for employment in energy-constrained applications, both the processing EC and the transmission EC must be jointly considered. In this tutorial, we investigate holistic design methodologies conceived for this purpose. We commence by introducing turbo coding in detail, highlighting the various parameters of TCs and characterizing their impact on the encoded bit rate, on the Radio Frequency (RF) bandwidth requirement, on the transmission EC and on the BER. Following this, energy-efficient TC decoder ApplicationSpecific Integrated Circuit (ASIC) architecture designs are exemplified and the processing EC is characterized as a function of the TC parameters. Finally, the TC parameters are selected in order to minimize the sum of the processing EC and the transmission EC.

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