Design and Optimization of Heterostructure Double Gate Tunneling Field Effect Transistor for Ultra Low Power Circuit and System

SeO2Microwires Designed as Low‐Temperature Abrupt Microelectronic Switches, Negative Resistance, and Negative Dielectric Constant Sources

“…Degenerate semiconductors conduct current by tunneling mechanism. [18] When the charge carriers gain sufficient thermal energy to overcome the barrier (crystallite boundaries in this case), the conduction through the crystallites becomes more significant than that at the boundaries. [17] To observe the temperature effect on the abrupt switching property of the SeO 2 microwires, the I-V characteristics were recorded in the temperature range of 300-220 K. Representative samples of the collected data of IÀV curves are illustrated in Figure 2b.…”

“…Degenerate semiconductors conduct current by tunneling mechanism. [ 18 ] When the charge carriers gain sufficient thermal energy to overcome the barrier (crystallite boundaries in this case), the conduction through the crystallites becomes more significant than that at the boundaries. [ 17 ]…”

Optimization for Device Figure of Merit of Ferroelectric Tunnel FET using Genetic Algorithm

“…Due to, smaller off-current (I OFF-TFET < I OFF-MOSFET ), steep subthreshold swing (SS TFET < 60 mV decade −1 ) and reliable with conventional CMOS process technology, Tunnel FETsare under investigationforultra low power circuit and system developmentfor future uses. [1][2][3][4][5][6][7][8][9][10] After observation and experimental verification of negative capacitances (NC) in ferroelectric materials (Fe), subthreshold swing based research and development has been taken seriously by semiconductor research community. [10][11][12][13][14][15] The ferroelectric materials based research&development, [11][12][13][14][15][16] provides a big domainto overcome the classical limitations [17][18][19][20][21][22] of conventional CMOS technology for low power.…”