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In this paper and using the charge pumping method, it is shown that in state-of-the-art fully processed MOSFET's the Si-SiO2 interface traps have the same properties as those of the Pb0 center. The question as to whether these defects are Pb0 centers is discussed. Devices using HfO2 as gate dielectric are also studied. In spite of some differences, it is found that the traps at the Si-SiO2 interface in these devices have the same properties as those in state-of-the-art fully processed MOSFET's. These differences are discussed. Finally, a method for extracting the interface trap density from the slope of the charge pumping curves is proposed and applied to the two kinds of devices studied.

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The present research letter is dedicated to a detailed analysis of a double-gate tunnel field-effect transistor (DG-TFET). The DG-TFET provides improved on-current (I ON) than a conventional TFET via bandto-band (B2B) tunneling. However, DG-TFET is disadvantageous for low-power applications because of increased off-current (I OFF) due to the large ambipolar current (I amb). In this research work, a Si/GaAs/ GaAs heterostructure DG-TFET is considered as research base for investigation of device performance. The electrical parameters of the DG-TFET device have been improved in comparison to the homostructure. The transfer (I-V) characteristics, capacitance-voltage (C-V) characteristic of homo structure Si/ Si/Si and hetero structure Si/GaAs/GaAs, DG-TFET both structures is analysed comparatively. The C-V characteristics of DG-TFET have obtained using operating frequency of 1 MHz. The ambipolar current Iamb is suppressed by 5 × 10 8 order of magnitude in proposed Si/GaAs/GaAs hetero DG-TFET as compared to Si/Si/Si homo DG-TFET up to the applied drain voltage very low equal to VDS = 0.5 V without affecting on-state performance. The simulation result shows a very good I ON /I OFF ratio (10 13) and low subthreshold slope, SS (~36.52 mV/dec). The various electrical characteristics of homo and hetero DG-TFET such as on-current (I ON), off-current (I OFF), time delay (ι d), transconductance (g m) , and power delay product (PDP) have been improve in Si/GaAs/GaAs heterostructure DG-TFET and compared with Si/Si/ Si homo DG-TFET. The advantageous results obtained for the proposed design show its usability in the field of digital and analog applications.