Rigorous Study of Double Gate Tunneling Field Effect Transistor Structure Based on Silicon

Guenifi, N.; Rahi, Shiromani Balmukund; Ghodbane, T.

doi:10.1166/mat.2018.1600

Cited by 20 publications

(10 citation statements)

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“…In recent years, researchers have proposed several TFETs with distinct architectures and materials . Among them, III‐V TFETs attracted wide attention because of their high ON current and lower subthreshold swing values .…”

Section: Tfet Device Characteristics and Demonstration Of Significantmentioning

confidence: 99%

“…In recent years, researchers have proposed several TFETs with distinct architectures and materials. [5][6][7][8] Among them, III-V TFETs attracted wide attention because of their high ON current and lower subthreshold swing values. 7,8 In this work, a universal analytical double-gate InAs TFET Verilog-A model with channel length L = 20 nm has been explored for TFET circuit design.…”

Section: Device Structure and Modelsmentioning

confidence: 99%

“…TFET exhibits steep subthreshold slope, enabling higher ON to OFF current ratios due to its band‐to‐band tunneling mechanism . In the recent past, numerous TFET device architectures have been proposed to obtain high ON current with sub‐60‐mV/dec switching operation . Among them, silicon TFETs have been proved to be desirable because of their matured fabrication process but exhibit lower ON current .…”

Section: Introductionmentioning

confidence: 99%

“…3,4 In the recent past, numerous TFET device architectures have been proposed to obtain high ON current with sub-60-mV/dec switching operation. [5][6][7][8] Among them, silicon TFETs have been proved to be desirable because of their matured fabrication process but exhibit lower ON current. 5,6 The researcher's investigation revealed that III-V TFETs achieve higher ON current because of the smaller bandgap of the material used.…”

Section: Introductionmentioning

confidence: 99%

“…[5][6][7][8] Among them, silicon TFETs have been proved to be desirable because of their matured fabrication process but exhibit lower ON current. 5,6 The researcher's investigation revealed that III-V TFETs achieve higher ON current because of the smaller bandgap of the material used. 7,8 In recent experimental demonstration, III-V TFET has achieved ON current of 92 μA/μm with 48-mV/dec subthreshold swing 9 at a supply voltage (V DD ) of 0.5 V. With high ON to OFF current ratio and lower subthreshold swing, TFET digital circuits achieve ultralow power consumption and high energy efficiency.…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

Tunnel FET‐based ultralow‐power and hardware‐secure circuit design considering p‐i‐n forward leakage

Japa

Majumder

Sahoo

et al. 2020

Circuit Theory & Apps

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Summary Tunnel field‐effect transistor (TFET) exhibits significant p‐i‐n forward leakage with the increase in drain‐to‐source voltage bias, and this adversely impacts the power consumption and reliability of TFET digital circuits. This work presents low‐power circuit techniques that result in novel compact gates and recommends tristate gates to mitigate the leakage effects. The proposed novel compact gates and tristate gates demonstrate two and six times lower power consumption compared with conventional TFET transmission gates with enhanced reliability. Further, this work introduces a new design methodology that leverages TFET p‐i‐n forward leakage for hardware obfuscation applications. Utilizing the proposed design methodology, the optimization of 40% and 80% in area and power consumption of hardware security primitives like true random number generators is also accomplished.

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Section: Tfet Device Characteristics and Demonstration Of Significantmentioning

confidence: 99%