Design and Optimization of Nonvolatile Multibit 1T1R Resistive RAM

Zangeneh, Mahmoud; Joshi, Ajay

doi:10.1109/tvlsi.2013.2277715

Cited by 109 publications

(37 citation statements)

References 34 publications

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“…R ESISTIVE random access memory (RRAM) is a promising candidate to replace the conventional charge-based nonvolatile memories for its ease of fabrication, high-speed operation and high-density integration [1], [2]. For practical application, the retention characteristic (times to retain the resistance states at certain temperatures) plays a crucial role, especially for embedded application, such as encryption, code storage, et al [3]- [5].…”

Section: Introductionmentioning

confidence: 99%

Superior Retention of Low-Resistance State in Conductive Bridge Random Access Memory With Single Filament Formation

Liu

et al. 2015

IEEE Electron Device Lett.

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Data retention is one crucial reliability aspect of resistive random access memory (RRAM). The retention failure mechanism of the low-resistance state (LRS) for conductive bridge RAM is generally originated from the lateral diffusion of metal ions/atoms from the filament to its surrounding medium. In this letter, we proposed an effective method to improve the LRS retention by controlling the formation of the single filament. For a certain LRS, the effective surface area for metal ions/atoms diffusion in single filament is less than that of multi-filament. Thus, better LRS retention characteristics can be achieved by reducing the metal species diffusion. The validity of this method is verified by the superior retention characteristics of the LRS programmed by current mode, in comparison with voltage programming mode. The former tends to generate a single filament, while the later grows multi-filament. This letter provides a possible way to enhance the retention characteristics of RRAM.Index Terms-Resistive random access memory (RRAM), single filament, multi-filament, data retention.

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Section: Introductionmentioning

confidence: 99%

Superior Retention of Low-Resistance State in Conductive Bridge Random Access Memory With Single Filament Formation

Liu

et al. 2015

IEEE Electron Device Lett.

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“…For instance, there are different mechanisms to read the stored values in memristive cells. These techniques are based on measuring the memristor state in form of current or voltage and comparing it with a reference value [22], [23].…”

Section: Impact Of Reliability Concerns In Memristive Memoriesmentioning

confidence: 99%

Memristive Crossbar Memory Lifetime Evaluation and Reconfiguration Strategies

Pouyan

Amat

Rubio

2018

IEEE Trans. Emerg. Topics Comput.

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Among the emerging technologies and devices for highly scalable and low power memory architectures, memristors are considered as one of the most favorable alternatives for next generation memory technologies. They are attracting great attention recently, due to their many appealing characteristics such as non-volatility and compatibility with CMOS fabrication process. But beside all memristor advantages, their drawbacks including manufacturing process variability and limited read/write endurance, could risk their future utilization. This paper will evaluate the impact of reliability concerns in lifetime of memristive crossbars and will present the design basis of two proposed reconfiguration approaches in memristive crossbarbased memories, in order to extend the system lifetime by utilizing available resources in an intense way and without need of failure recovery. It is observed that the adaptive reconfiguring approach can improve the crossbar reliability and extend its lifetime up to 65% in comparison with non-adaptive reconfiguration strategy.

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“…Therefore to better analyze the impact of the variations in memristive memories we assume that our memristive crossbar memory (Fig. 5.a) is constructed by 1T1R storage cells [19,20] (Fig. 5.b, to avoid sneak path [21]) and CMOS peripheral [19].…”

Section: Process Variability and Aging On Reading Cyclementioning

confidence: 99%

Reliability challenges in design of memristive memories

Pouyan

Amat

Rubio

2014

2014 5th European Workshop on CMOS Variability (VARI)

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Abstract-The demand for highly scalable and low power memory has led to research in emerging technologies and devices. Among these devices, memristors has attracted increased attention as being a promising storage device. However, due to its nano-scale size it faces various types of reliability issues. In this study, we have reviewed the memristive mechanisms and reliability concerns existing in memristor memory design. Then, we have simulated the ionic drift memristor model in presence of the process variability. Next, by considering a normal distribution for the resistive distribution of memristors in LRS and HRS state we have shown the instabilities and probability of failure in read and write procedure of memristive memories, and highlighted the requisite and motivation for the reliability aware memristive circuit design.

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Design and Optimization of Nonvolatile Multibit 1T1R Resistive RAM

Cited by 109 publications

References 34 publications

Superior Retention of Low-Resistance State in Conductive Bridge Random Access Memory With Single Filament Formation

Superior Retention of Low-Resistance State in Conductive Bridge Random Access Memory With Single Filament Formation

Memristive Crossbar Memory Lifetime Evaluation and Reconfiguration Strategies

Reliability challenges in design of memristive memories

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