Design and simulation of distributed IMA architectures using TTEthernet: a model-driven approach

Robati, Tiyam; Gherbi, Abdelouahed; Kouhen, Amine El; Mullins, John

doi:10.1007/s12652-017-0449-9

Cited by 9 publications

(3 citation statements)

References 19 publications

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“…Once the BPMN+BPSIM model is transformed into the I2M, the subsequent transformation step involves the conversion of the I2M into a DEVS model which is carried out using Model to Model transformation. Finally, DEVS-Suite code is generated using Model to Text (JAVA Code) transformation similar to the one performed in Robati et al (2015). The generated code can then be executed in the DEVS-Suite simulator (Sarjoughian and Mahmoodi Markid 2012).…”

Section: Transformationmentioning

confidence: 99%

Incremental Transformation of BPSIM-Enriched BPMN Models into DEVS

El Kassis,

Trousset,

Zacharewicz

et al. 2023

2023 Winter Simulation Conference (WSC)

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This paper introduces a novel methodology for business process simulation, focusing on the incremental transformation of Business Process Modeling and Notation (BPMN) models enriched with Business Process Simulation Interchange Standard (BPSIM) elements into the Discrete Event System Specification (DEVS) formalism. The proposed method enhances the precision and consistency of simulations by systematically converting BPMN components and BPSIM characteristics into DEVS representations, using adaptable rules and templates. A major contribution of this work is the introduction of the Interaction Intermediate Model (I2M), a model that provides a visually lucid representation with significant semantics, effectively encapsulating BPMN and BPSIM simulation aspects. The resulting DEVS model ensures accurate, reliable, and interoperable simulations. We provide a thorough analysis of this methodology, emphasize its advantages, and validate its efficiency through a case study. This method, applicable across various sectors, equips stakeholders with the ability to make informed decisions based on accurate simulation insights, effectively bridging the gap between conceptual modeling and simulation methodologies.

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Section: Transformationmentioning

confidence: 99%

Incremental Transformation of BPSIM-Enriched BPMN Models into DEVS

El Kassis,

Trousset,

Zacharewicz

et al. 2023

2023 Winter Simulation Conference (WSC)

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“…The sharing of hardware platforms makes the architecture integration into a virtual process, which shifts the temporal verification task from the supplier to the integrator [33]. Modeling is a promising method to settle these problems by simulating and validating the virtual integration plan [34], [35]: meanwhile, tools such as the AADL-based toolsets are designed for the verification of the design [29], and the utilization of timed automata for IMA temporal requirement verification was designed and proven to be helpful. Furthermore, CPM utilization and communication robustness performance criteria are used to quantify the quality of a set of valid temporal allocations [36].…”

Section: Related Work a Temporal Allocation In Ima Integrationmentioning

confidence: 99%

Independent Temporal Integration of ARINC653 Conformed Architecture — A Search Based Solution

et al. 2020

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ARINC653-based integrated modular avionics (IMA) architecture has been widely adopted in the design of modern civil and military aircraft. IMA imposes various requirements on the underlying operating system, of which the temporal and spatial separation requirements are essential to task allocation. In practice, finding the optimal allocation configurations of tasks to enable processing modules to satisfy various temporal constraints is one of the greatest challenges. For that purpose, hundreds of tasks must be mapped into given processing modules, which has been proven to be a nonpolynomial problem. This paper introduces a search-based approach to aid in finding effective solutions for the task allocation problem in polynomial time. Two search techniques based on both population search (genetic algorithm) and neighbor search (simulated annealing), along with their multicore versions, are presented. A heuristic is designed specifically to validate whether candidate solutions fulfill various constraints implied by IMA, and thus to evaluate the fitness. Furthermore, the multicore version is designed to reduce the time delay of obtaining a new optimized configuration. The results show that both algorithms can ultimately find optimized solutions with utility rates above 90% in all configurations and can support the optimization over 100 tasks, which is an outstanding result. The result also reveals that simulated annealing can produce a better solution under limited resources, while the genetic algorithm will determine a valid solution within a shorter time period. Moreover, simulated annealing outperforms the genetic algorithm in terms of both effectiveness and efficiency with respect to solving this allocation problem with complicated constraints.

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“…7 To improve the quality of clock synchronization, TTEthernet o®ers fault-tolerant clock synchronization algorithm and fault isolation mechanisms to manage nodes failures. 8 TTEthernet is con¯gurable to support singlefailure and dual-failure hypotheses. Under the single-failure hypothesis, TTEthernet is intended to tolerate either the fail-arbitrary failure of an end system or the failinconsistent-omission failure of a switch.…”

Section: Introductionmentioning

confidence: 99%

An Application-Level Method of Arbitrary Synchronization Failure Detection in TTEthernet Networks

Tang

et al. 2019

J CIRCUIT SYST COMP

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Precise distributed clock synchronization is important for Time-Triggered Ethernet (TTEthernet) in which fail-arbitrary synchronization failure cannot be treated by existed protocols unless every synchronization node is equipped with a dedicated clock monitoring. A novel method was presented to detect arbitrary synchronization failure by some application-level routines which make distributed decisions mainly by monitoring the protocol control frames (PCFs). An arbitrary failure node can be exactly detected and located by the routine resided on each of the Compression Masters based on the concerned accusation messages sent from Synchronization Masters or Synchronization Clients. The proposed method can make up the weak points on the detection of the arbitrary failure node of the existed fault-tolerant synchronization mechanism and enhance the synchronization node to resist the arbitrary failure for TTEthernet. By our SAL-based model checking, this method had been formally verified to have a fail-arbitrary detection capacity even in a standard integration configuration. Simulations imply that the quality of the whole clock synchronization is effectively improved after the failure node has been isolated.

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Design and simulation of distributed IMA architectures using TTEthernet: a model-driven approach

Cited by 9 publications

References 19 publications

Incremental Transformation of BPSIM-Enriched BPMN Models into DEVS

Incremental Transformation of BPSIM-Enriched BPMN Models into DEVS

Independent Temporal Integration of ARINC653 Conformed Architecture — A Search Based Solution

An Application-Level Method of Arbitrary Synchronization Failure Detection in TTEthernet Networks

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