Design automation for obfuscated circuits with multiple viable functions

Abstract

Gate camouflaging is a technique for obfuscating the function of a circuit against reverse engineering attacks. However, if an adversary has pre-existing knowledge about the set of functions that are viable for an application, random camouflaging of gates will not obfuscate the function well. In this case, the adversary can target their search, and only needs to decide whether each of the viable functions could be implemented by the circuit.In this work, we propose a method for using camouflaged cells to obfuscate a design that has a known set of viable functions. The circuit produced by this method ensures that an adversary will not be able to rule out any viable functions unless she is able to uncover the gate functions of the camouflaged cells. Our method comprises iterated synthesis within an overall optimization loop to combine the viable functions, followed by technology mapping to deploy camouflaged cells while maintaining the plausibility of all viable functions. We evaluate our technique on cryptographic S-box functions and show that, relative to a baseline approach, it achieves up to 38% area reduction in PRESENT-style S-Boxes and 48% in DES S-boxes.

Obfuscating the interconnects: Low-cost and resilient full-chip layout camouflaging

“…IV, we have to choose dummy nets carefully such that they are unique with respect to each gate to camouflage. 5 Independent from our work, Keshavarz et al [36] recently called for maintaining the plausibility of all (chip-level) viable functionalities, albeit with a focus on logic synthesis and technology mapping, and without assuming that a working chip is available as an oracle for the (SAT-centric) attacks. We do so by applying a local spatial search around each gate's inputs; nearby nets/wires are preferably selected to limit the routing congestion.…”

Hardware/Software Obfuscation against Timing Side-channel Attack on a GPU

“…Side-channel attacks exploit information recorded during execution of encryption/decryption. There are many types of attacks and countermeasures in different levels of the design [23], [24], [25], [26], [27], [28]. The memory hierarchy is one of the most common targets for the attacker.…”

Algorithmic Obfuscation over GF($2^m$)

“…With such camouflaged cells, designing circuits with constant inputs camouflaged becomes possible. For example, a 2-NAND is proposed to implement camouflaged constant one/zero by modifying the doping of different transistors [11]. A variant of dopant-programmable cells is to build components in a dual-Vt process technology such that inferring the correct component functions would require identification of which devices use high and low thresholds [12].…”