7th IEEE Conference on Instrumentation and Measurement Technology
DOI: 10.1109/imtc.1990.65964
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Design for testability using behavioral models

Abstract: A systematic approach to analog design-for-testability is presented which uses behavioral modelc for fault simulation so that objective comparisons can be made between alternative test configurations. The suitability for use with ASIC design strategies is demorutrated.

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Cited by 10 publications
(3 citation statements)
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“…Circuit partitioning into its behavioral blocks has a number of advantages from the points of view of both system design and testing, as discussed, e.g., in [4,18,19]. The lack of efficient methods for parametric diagnosis of analog behavioral blocks has been pointed out in this literature.…”
Section: Ota-c Filtermentioning
confidence: 99%
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“…Circuit partitioning into its behavioral blocks has a number of advantages from the points of view of both system design and testing, as discussed, e.g., in [4,18,19]. The lack of efficient methods for parametric diagnosis of analog behavioral blocks has been pointed out in this literature.…”
Section: Ota-c Filtermentioning
confidence: 99%
“…The present work is an attempt to find a solution to this problem. In order to maintain continuity of the discussion originated in [ 18] the same circuit example is used, as shown in Fig. 8.…”
Section: Ota-c Filtermentioning
confidence: 99%
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