2019 IEEE International Conference on Rebooting Computing (ICRC) 2019
DOI: 10.1109/icrc.2019.8914699
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Design of a 16-Bit Adiabatic Microprocessor

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Cited by 11 publications
(10 citation statements)
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“…We compare these circuits in Table IV. Our superconductor AQFP circuits surpass all of them in terms of clock rates by approximately three orders of magnitude compared with most adiabatic circuits, with a 5× advantage when compared with [40]. These much higher clock rates are still possible while also exhibiting higher energy efficiency by two to three orders of magnitude despite the extra power needed to cool the circuits to cryogenic temperatures.…”
Section: Discussionmentioning
confidence: 93%
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“…We compare these circuits in Table IV. Our superconductor AQFP circuits surpass all of them in terms of clock rates by approximately three orders of magnitude compared with most adiabatic circuits, with a 5× advantage when compared with [40]. These much higher clock rates are still possible while also exhibiting higher energy efficiency by two to three orders of magnitude despite the extra power needed to cool the circuits to cryogenic temperatures.…”
Section: Discussionmentioning
confidence: 93%
“…The experimental results show that we can indeed perform computation using superconductor AQFP logic. A number of other adiabatic circuits have been reported, including an experimentally demonstrated 16−b carry look-ahead adder (CLA) [38], a demonstrated 8−b DLX-based microprocessor [39], and an in-progress physical design of a 16−b microprocessor [40]. We compare these circuits in Table IV.…”
Section: Discussionmentioning
confidence: 99%
“…We compare several parallel adders under various technologies including superconductor RSFQ/ERSFQ [14], RQL [15], and 90-nm adiabatic CMOS [16]. We decided to The first 20 vectors in this list correspond to the random tests in Fig.…”
Section: Comparison With Different Technologiesmentioning
confidence: 99%
“…We include RQL as well even though the reported design is only 8-bit because it is an AC-biased logic just like AQFP, and it is also considered a very energy-efficient technology. Finally, we in-cluded the 90-nm adiabatic CMOS work reported in [16] because even though the designs have not been experimentally demonstrated, it is one of the more recent works using a 90-nm fabrication process to manufacture devices that operate adiabatically like AQFP. The area, number of Josephson junctions (JJs) when applicable, bias magnitude, target operating frequency, and energy/op are compared in Table 3.…”
Section: Comparison With Different Technologiesmentioning
confidence: 99%
“…There are also reports of chips designed using adiabatic circuits [8]. However, these circuits have drawbacks such as floating nodes, poor efficiency at higher frequencies, and narrow scope of application due to complex clocking schemes [9]. Generally, there is little description of the challenges involved in combining gates.…”
Section: Introductionmentioning
confidence: 99%