Design of a 32.7-GHz bandwidth AGC amplifier IC with wide dynamic range implemented in SiGe HBT

Ohhata, Kenichi; Masuda, Takatsugu; Ohue, E.; Washio, Katsuyoshi

doi:10.1109/4.782090

Cited by 30 publications

(14 citation statements)

References 14 publications

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“…10) with optimized peaking. The peaking effect in the amplifier transimpedance gain function is necessary to maximize the amplifier bandwidth [11]. A high input impedance nonlinear amplifier, which is functionally similar to a low-frequency Schmidt trigger (Fig.…”

Section: Digital Output Link: Cooled Sige Amplifiermentioning

confidence: 99%

Integration of cryocooled superconducting analog-to-digital converter and SiGe output amplifier

Gupta

Kadin

Webber

et al. 2003

IEEE Trans. Appl. Supercond.

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Abstract-HYPRES is developing a prototype digital system comprising a Nb RSFQ analog-to-digital converter (ADC) and SiGe amplifiers on a commercial two-stage cryocooler. This involves the detailed thermal, electrical, and mechanical design of the ADC chip mount, input/output (I/O) cables, and electromagnetic shielding. Our objective is to minimize the heat load on the second (4 K) stage of the cryocooler, in order to ensure stable ADC operation. The design incorporates thermal radiation shields and magnetic shielding for the RSFQ circuit. For the I/O cables, the thermal design must be balanced against the acceptable attenuation of rf lines and resistance of dc bias lines. SiGe heterojunction bipolar transistor (HBT) signal conditioning circuits, placed on the first (60 K) stage of the cryocooler, will amplify the mV-level ADC outputs to V-level (e.g. ECL) outputs for seamless transition to room-temperature electronics. Cooling these HBT circuits lowers noise and improves their high-frequency performance. Demonstration of this prototype should lead the way to commercialization of highspeed digital superconducting systems, for such applications as wireless communication, radars, and switching networks.Index Terms-Closed-cycle refrigerator, Cryopackaging, Digital Receiver, Cryoelectronics, Thermal Management, Broadband Digital Link. I. INTRODUCTIONWhile the superior performance of superconducting digital electronics (SCE) has been demonstrated, no significant market for these has emerged so far. There are several reasons for this lack of commercial success: (1) until recently, no commercial application with a significant market demanded a level of performance that can only be attained with SCE, (2) almost all demonstrations have used liquid helium as a cryogen which is unacceptable for most commercial products, (3) ultra-fast, low-level signals used in SCE are incompatible with room temperature electronics (RTE). Recently, the situation has changed dramatically. The explosive demand for information bandwidth in the commercial and military wireless communication market has created a unique opportunity for superconducting digital electronics in software defined radio (SDR). Reliable, reasonably compact, and affordable 4 K cryocoolers are now available and have been used commercially by HYPRES to cool the Josephson primary voltage standard chip. Finally, improvements in cooled semiconductor low-noise, broadband amplifiers make it feasible to interface SCE with RTE in a manner that is transparent to the user.In this article, we focus on small-scale SCE digital systems, consisting of a single integrated circuit (IC) or a few ICs on a multi-chip module (MCM), rather than large-scale digital systems. The architecture of a small-scale digital system, such as a digital-RF transceiver for wireless communications [1] is shown in Fig. 1. The superconductor ICs, assumed to be Nb RSFQ circuits, need to be cooled to 4-5 K, which requires a closed-cycle refrigerator (CCR) or cryocooler with at least two temperature stages. The hig...

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Section: Digital Output Link: Cooled Sige Amplifiermentioning

confidence: 99%

Integration of cryocooled superconducting analog-to-digital converter and SiGe output amplifier

Gupta

Kadin

Webber

et al. 2003

IEEE Trans. Appl. Supercond.

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“…A lumped circuit configuration typically offers higher gain values and consumes less chip area at the cost of lower maximum output power. Broadband amplifiers based on lumped elements have been presented in [2], [3], [4], and [5] but do not deliver sufficient output power and occupy larger chip areas. In the following sections the analysis, design and measurement results of a fully integrated broadband amplifier based on lumped elements are presented.…”

Section: Introductionmentioning

confidence: 99%

A 30GHz bandwidth driver amplifier with high output voltage swing for ultra-wideband localization- and sensor systems

Sewiolo

Rascher

Weigel

2008

2008 Asia-Pacific Microwave Conference

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This paper reports on the analysis, design and characterization of a 30 GHz lumped broadband driving amplifier for Ultra-Wideband localization and sensor systems. The circuit integrates a cascode differential stage, which is fed by two cascaded emitter-followers (EF). The differential gain is 10 dB with a gain flatness of ±1 dB in the desired frequency range. This amplifier exhibits an output 1-dB compression point of 12 dBm. The maximum differential output voltage swing is 3.2 V pp . The amplifier consumes a power of 560 mW at a supply voltage of ±3.3 V. The compact 0.5 mm 2 amplifier is manufactured in a low-cost 0.25 μm SiGe BiCMOS technology with a transit frequency of 75 GHz.

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“…Since their optical/electrical bandwidth and conversion gain dominate the entire characteristics of the receivers [6], improving these crucial parameters are paramount in high data rate capability of the optical systems. For photoreceiver circuits' implementations, HEMTs [3,[5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22].…”

Section: Introductionmentioning

confidence: 99%

Low‐cost InP–InGaAs PIN–HBT‐based OEIC for up to 20 Gb/s optical communication systems

Muttlak

Kostakis²,

Abdulwahid

et al. 2019

IET Optoelectronics

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A detailed study of the performance analysis of a low cost PIN/HBT optoelectronic integrated circuit is described. Measured and of 54 and 57GHz for 10×10µm 2 HBTs were achieved for such a large emitter size. The base and collector regions of the transistor were utilized to form a PIN photodiode which has a dc responsivity and quantum efficiency of 0.5 A/W and 0.45 respectively without antireflection coating at a wavelength of 1.55µm. For both active devices, a model was realized taking all parasitic and physical-based impacts into account, for example equivalent circuit of the pads surrounding the devices and transit delay time across the collector depletion region. The simulation results of the discrete passive and active elements showed good agreement with experimental measurements. The OEIC module was implemented in Keysight-advanced design system software with a three stage preamplifier which has a transimpedance gain of 40dBΩ and a-3dB bandwidth of 18GHz. This corresponds to a transimpedance-gain product of 1.8THz. A series peaking inductor technique was used in the design, contributing to an enhancement in the opto-electrical bandwidth of >60%. The optical/electrical response offers a bandwidth of ~15GHz, adequate for up to 20 Gb/s data rate operation.

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Design of a 32.7-GHz bandwidth AGC amplifier IC with wide dynamic range implemented in SiGe HBT

Cited by 30 publications

References 14 publications

Integration of cryocooled superconducting analog-to-digital converter and SiGe output amplifier

Integration of cryocooled superconducting analog-to-digital converter and SiGe output amplifier

A 30GHz bandwidth driver amplifier with high output voltage swing for ultra-wideband localization- and sensor systems

Low‐cost InP–InGaAs PIN–HBT‐based OEIC for up to 20 Gb/s optical communication systems

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