Design of a Linear High-Drive Class-AB Differential Amplifier in 90 nm CMOS Technology

Obaid, Hafiz Muhammad; Chaudhry, Shabbir Majeed

doi:10.1007/s40009-015-0392-2

Cited by 3 publications

(3 citation statements)

References 6 publications

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“…Buffer amplifiers are main part of the screens. They directly affect power consumption, settling time, speed, bandwidth and other parameters [3][4][5].…”

Section: Introductionmentioning

confidence: 99%

“…Developments in integrated circuit technology, particularly circuits related to displays and their improvements, indicate that there is a need to have a high-quality and high-speed circuit under low voltage source and low power consumption [3][4][5]. Recently, the technology and consumer tendency are portable devices such as cell phone and tablet.…”

Section: Introductionmentioning

confidence: 99%

“…Recently, the technology and consumer tendency are portable devices such as cell phone and tablet. In this process, many attempts have been done to improve the circuits to achieve the objectives that generally focus on parameters such as the slew rate, voltage swing, bandwidth, maximum load current and low power consumption [3][4][5].…”

Section: Introductionmentioning

confidence: 99%

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High-bandwidth buffer amplifier for liquid crystal display applications

Sadoni

Rezai

2017

FACTA U EE

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In this paper, a novel high-bandwidth and low-power buffer amplifier is presented for the liquid crystal display applications. This buffer amplifier consists of a folded cascade differential amplifier in the input and a class-AB amplifier in the output, which are designed carefully. The proposed buffer amplifier utilizes a high-performance feedback circuit to increase the bandwidth. It also utilizes a comparator circuit to avoid wasting power. The designed circuit has been simulated in 180nm technology using HSPICE 2008.3. The simulation results show that the bandwidth, power consumption and power supply of the designed circuit are 1.14MHz, 1.64mW and 1.8V, respectively.

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“…Buffer amplifiers are main part of the screens. They directly affect power consumption, settling time, speed, bandwidth and other parameters [3][4][5].…”

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

High-bandwidth buffer amplifier for liquid crystal display applications

Sadoni

Rezai

2017

FACTA U EE

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A Novel Architecture for 10-bit 40MSPS Low Power Pipelined ADC Using a Simultaneous Capacitor and Op-amp Sharing Technique

Sam

Moni

Paul

et al. 2021

Silicon

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This work presents a low power 10-bit 40 MSPS Pipelined ADC with 1.8V supply voltage in a 180nm silicon based CMOS process. Simultaneous capacitor sharing and op-amp sharing technique is used between two successive stages of a Sample-and Hold Ampifier (SHA) to reduce the power consumption.The memory effect in the proposed ADC is eliminated by a low input capacitance variable gm op-amp. The differential and integral nonlinearity of the converter are within LSB.Simulation results show that the required Signal-Furious-Dynamic range (SFDR) of 70dB, Signal-to -Noise-plus Distortion Ratio (SNDR) of 56.1dB and 9.02 Effective Number of Bits ( ENOB ) has been achieved with a 2MHz, 1-Vp-p,diff input signal while consuming only 7.3mW power from 1.8V supply.

show abstract

A Novel Architecture for 10-bit 40MSPS Low Power Pipelined ADC using Simultaneous Capacitor and Op-amp Sharing Technique

Sam

Moni

Paul

et al. 2021

Preprint

View full text Add to dashboard Cite

This work presents a low power 10-bit 40 MSPS Pipelined ADC with 1.8V supply voltage in a 180nm silicon based CMOS process. Simultaneous capacitor sharing and op-amp sharing technique is used between two successive stages of a Sample-and Hold Ampifier (SHA) to reduce the power consumption.The memory effect in the proposed ADC is eliminated by a low input capacitance variable gm op-amp. The differential and integral nonlinearity of the converter are within LSB.Simulation results show that the required Signal-Furious-Dynamic range (SFDR) of 70dB, Signal-to -Noise-plus Distortion Ratio (SNDR) of 56.1dB and 9.02 Effective Number of Bits ( ENOB ) has been achieved with a 2MHz, 1-Vp−p,diff input signal while consuming only 7.3mW power from 1.8V supply.

show abstract

Design of a Linear High-Drive Class-AB Differential Amplifier in 90 nm CMOS Technology

Cited by 3 publications

References 6 publications

High-bandwidth buffer amplifier for liquid crystal display applications

High-bandwidth buffer amplifier for liquid crystal display applications

A Novel Architecture for 10-bit 40MSPS Low Power Pipelined ADC Using a Simultaneous Capacitor and Op-amp Sharing Technique

A Novel Architecture for 10-bit 40MSPS Low Power Pipelined ADC using Simultaneous Capacitor and Op-amp Sharing Technique

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