Design of a novel dual-band concurrent CMOS LNA with current reuse topology

Kargaran, Ehsan; Madadi, Bahman

doi:10.1109/icnit.2010.5508490

Cited by 18 publications

(10 citation statements)

References 2 publications

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“…A Unique dual band concurrent fully integrated LNA with current reuse topology is proposed [10]. Concurrent LNAs are provided as they achieve narrowband gain and matching at multiple frequencies.…”

Section: Fig 3 Current Reuse Topologymentioning

confidence: 99%

Single Stage 180nm CMOS Low Noise Amplifier Topologies and Optimization Algorithms for S Band Frequency

D*¹,

Kavya²

2019

IJRTE

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Low Noise Amplifier (LNA) plays an important role in radio receivers. It mainly determines the system noise and intermodulation behavior of overall receiver. LNA design is more challenging as it requires high gain, low noise figure, good input and output matching and unconditional stability. Further, designing a Low noise Amplifier requires active device selection, amplifier topology, optimization algorithms for superlative results. Hence this paper presents performance analysis of CMOS LNA based on different topologies and optimization algorithms for 180nm RF CMOS design in S band frequency. Here the best results, various limitations in each topology are reviewed and required specifications are determined in each designing. Further this best topology is used for designing LNA circuit which could be used in Indian Regional Navigation Satellite System (IRNSS) applications in dual band frequency.

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Section: Fig 3 Current Reuse Topologymentioning

confidence: 99%

Single Stage 180nm CMOS Low Noise Amplifier Topologies and Optimization Algorithms for S Band Frequency

D*¹,

Kavya²

2019

IJRTE

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“…Recently, dual-band and multi-band transceivers draw much attention for the versatile functionality of such communication systems [1][2][3][4]. Conventional dual-band transceivers are implemented by switching two separate receiver chains [5][6][7].…”

Section: Introductionmentioning

confidence: 99%

A High-Gain Cmos Lna for 2.4/5.2-GHZ Wlan Applications

Wang¹,

Huang²

2011

PIER C

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Abstract-This paper describes a high-gain CMOS low-noise amplifier (LNA) for 2.4/5.2-GHz WLAN applications. The cascode LNA uses an inductor at the common-gate transistor to increase its transconductance equivalently, and therefore it enhances the gain effectively with no additional power consumption. The LNA is matched concurrently at the two frequency bands, and the input/output matching networks are designed with two notch frequencies to shape the frequency response. The dual-band LNA with the common-gate inductor is designed, implemented, and verified in a standard 0.18-µm CMOS process. The fabricated LNA which consumes 7.2 mW features gains of 14.2 dB and 14.6 dB, and noise figures of 4.4 dB and 3.7 dB at the 2.4-GHz and 5.2-GHz frequency bands, respectively. The proposed LNA demonstrates a 4.9-7.8 dB gain enhancement compared to conventional cascode LNAs, and the chip size is 1.06 mm × 0.79 mm including all testing pads.

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“…MIT has many advantages including low noise, high stability, simple, and easy in fabrication. The Z IN is given by (18) with , propagations constant (b), and electrical length ( ). …”

Section: Multi-section Impedance Transformer (Mit)mentioning

confidence: 99%

“…There are several method frequenly used for MLNAdesign such as; wideband matching [15], switch method [16], and concurrent multiband [17][18][19]. The wideband method can produce LNA with wide frequency operating.…”

Section: Introductionmentioning

confidence: 99%

Concurrent Quad-band Low Noise Amplifier (QB-LNA) using Multisection Impedance Transformer

Pramudyo

Wardoyo

Wiryadinata

et al. 2017

IJECE

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A quad-band low noise amplifier (QB-LNA) based on multisection impedance transformer designed and evaluated in this research. As a novelty, a multisection impedance transformer was used to produce QB-LNA. A multisection impedance transformer is used as input and output impedance matching because it has higher stability, large Q factor, and low noise than lumpedcomponent.The QB-LNA was designed on FR4 microstrip substrate with r= 4.4, thickness h=1.6 mm, and tan = 0.026. The proposed QB-LNA was designed and analyzed by Advanced Design System (ADS).The simulation has shown that QB-LNA achieves gain (S 21 ) of 22.91 dB, 16.5 dB, 11.18 dB, and 7.25 dB at 0.92 GHz, 1.84 GHz, 2.61 GHz, and 3.54 GHz, respectively.The QB-LNA obtainreturn loss (S 11 ) of -21.28 dB, -31.87 dB, -28.08 dB, and -30.85 dB at 0.92 GHz, 1.84 GHz, 2.61 GHz, and 3.54 GHz, respectively. It also achieves a Noise figure (nf) of 2.35 dB, 2.13 dB, 2.56 dB, and 3.55 dB at 0.92 GHz, 1.84 GHz, 2.61 GHz, and 3.54 GHz, respectively. This research also has shown that the Figure of merit (FoM) of the proposed QB-LNA is higher than that of another multiband LNA.

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Design of a novel dual-band concurrent CMOS LNA with current reuse topology

Cited by 18 publications

References 2 publications

Single Stage 180nm CMOS Low Noise Amplifier Topologies and Optimization Algorithms for S Band Frequency

Single Stage 180nm CMOS Low Noise Amplifier Topologies and Optimization Algorithms for S Band Frequency

A High-Gain Cmos Lna for 2.4/5.2-GHZ Wlan Applications

Concurrent Quad-band Low Noise Amplifier (QB-LNA) using Multisection Impedance Transformer

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