Design of a Novel Inexact 4:2 Compressor and Its Placement in the Partial Product Array for Area, Delay, and Power-Efficient Approximate Multipliers

Beura, Srikant Kumar; Devi, Bishnulatpam Pushpa; Saha, Prabir Kumar; Meher, Pramod Kumar

doi:10.1007/s00034-024-02630-4

Circuits Syst Signal Process

2024

DOI: 10.1007/s00034-024-02630-4

|View full text |Cite

Design of a Novel Inexact 4:2 Compressor and Its Placement in the Partial Product Array for Area, Delay, and Power-Efficient Approximate Multipliers

Srikant Kumar Beura,

Bishnulatpam Pushpa Devi,

Prabir Kumar Saha

et al.

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...

Citation Types

Supporting

Mentioning

Contrasting

Year Published

2024

Publication Types

Select...

Article2

Relationship

Self Cite0

Independent2

Authors

Journals

Cited by 2 publications

References 27 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

Design of a Quaternary Component and Wallace Tree Integrated Baugh-Wooley Multiplier

Juneja,

Jangra,

Khurana

2024

Int J Netw Distrib Comput

View full text Add to dashboard Cite

Design of a Quaternary Component and Wallace Tree Integrated Baugh-Wooley Multiplier

Juneja,

Jangra,

Khurana

2024

Int J Netw Distrib Comput

View full text Add to dashboard Cite

An Efficient Approximate Multiplier with Encoded Partial Products and Inexact Counter for Joint Photographic Experts Group Compression

Esmaeili,

Shiri

2024

IET Circuits, Devices & Systems

View full text Add to dashboard Cite

Approximate computing is commonly employed in applications where accuracy is not crucial and aims to enhance circuit performance when inaccurate results are not challenging. The multipliers are power‐hungry, and their approximation has been the target of research, especially by using approximate counters. In this study, a low‐power and high‐speed approximate 4 : 2 counter is proposed to add partial product (PP) bits. Also, a new partial product generation (PPG) is introduced by inserting errors in Karnaugh’s map to reduce the circuit complexity. The counter and PPG make a new radix‐4‐based 8 × 8 Booth multiplier, which is synthesized targeting a 32‐nm carbon nanotube field‐effect transistor (CNTFET) technology to determine the hardware characteristics. Looking at the normalized mean error distance (NMED), the multiplier has a 51.33% power–delay product (PDP) saving and acceptable accuracy. Besides, the multiplier which is configured by the counter and PPG accomplishes a 28.31% savings in the PDP × NMED in comparison with other approximate Booth multipliers. The case study of joint photographic experts group (JPEG) compression is performed, and the proposed multiplier outperforms references by higher quality results along with lower power consumption.

show abstract

scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.

Contact Info

customersupport@researchsolutions.com

10624 S. Eastern Ave., Ste. A-614

Henderson, NV 89052, USA

This site is protected by reCAPTCHA and the Google Privacy Policy and Terms of Service apply.

Blog Terms and Conditions API Terms Privacy Policy Contact Cookie Preferences Do Not Sell or Share My Personal Information

Made with 💙 for researchers

Part of the Research Solutions Family.

Design of a Novel Inexact 4:2 Compressor and Its Placement in the Partial Product Array for Area, Delay, and Power-Efficient Approximate Multipliers

Cited by 2 publications

References 27 publications

Design of a Quaternary Component and Wallace Tree Integrated Baugh-Wooley Multiplier

Design of a Quaternary Component and Wallace Tree Integrated Baugh-Wooley Multiplier

An Efficient Approximate Multiplier with Encoded Partial Products and Inexact Counter for Joint Photographic Experts Group Compression

Contact Info

Product

Resources

About