2006
DOI: 10.1109/jssc.2006.872704
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Design of Charge Pump Circuit With Consideration of Gate-Oxide Reliability in Low-Voltage CMOS Processes

Abstract: Abstract-A new charge pump circuit with consideration of gateoxide reliability is designed with two pumping branches in this paper. The charge transfer switches in the new proposed circuit can be completely turned on and turned off, so its pumping efficiency is higher than that of the traditional designs. Moreover, the maximum gate-source and gate-drain voltages of all devices in the proposed charge pump circuit do not exceed the normal oper-

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Cited by 182 publications
(75 citation statements)
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“…Ongoing research is addressing improved approaches for device packaging to more substantially compensate temperature variations as well as to reduce the hysteresis in response due to stress relaxation (in the adhesive) following cyclic loading on the device. An on-chip DC bias generator based on a charge pump circuit [43] is being developed to eliminate the cumbersome high voltage batteries at the expense of some increase in power consumption [44]. Integration of the MEMS strain sensor into a wireless sensor network for infrastructure monitoring is also being pursued.…”
Section: Summary and Future Workmentioning
confidence: 99%
“…Ongoing research is addressing improved approaches for device packaging to more substantially compensate temperature variations as well as to reduce the hysteresis in response due to stress relaxation (in the adhesive) following cyclic loading on the device. An on-chip DC bias generator based on a charge pump circuit [43] is being developed to eliminate the cumbersome high voltage batteries at the expense of some increase in power consumption [44]. Integration of the MEMS strain sensor into a wireless sensor network for infrastructure monitoring is also being pursued.…”
Section: Summary and Future Workmentioning
confidence: 99%
“…5b. These dual-branch structures were introduced to lower ripples in the CTS design (Kleveland, 2002;New et al, 2012) and later evolved into latch-based designs (Nakagome et al, 1991;Gariboldi and Pulvirenti, 1994;1996;Favrat et al, 1998;Pelliconi et al, 2003;Ker et al, 2006;Che et al, 2009;Chen et al, 2010;Ulaganathan et al, 2012;Peng et al, 2014;Kim et al, 2015) which are currently gaining popularity. These structures have V OUT similar to Equation 1 but with reduced charge transfer intervals of T/2 (Palumbo and Pappalardo, 2010), circuit minimization with smaller C PUMP values and half the ripple, V R compared to single branch CPs where V R is expressed as V R = I OUT T/[2(C OUT +C PUMP )] (Pan and Samaddar, 2010) assuming C OUT >> C PUMP .…”
Section: Dual-branch Charge Pumpmentioning
confidence: 99%
“…The Cross-Coupled CPs were originally proposed in (Gariboldi and Pulvirenti, 1994;1996) and later implemented as a four stage cascaded version in Ker et al (2006) CP design. The Cross-Coupled topologies are realized with cross-coupled switches driven by antiphase clocks for boosted voltages.…”
Section: Cross-coupled Charge Pumpmentioning
confidence: 99%
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“…2. Typically, the charge pump circuit realized with low-voltage transistor for reducing the parasitic capacitance and the physical layout size [7].…”
Section: Introductionmentioning
confidence: 99%