Design of FPGA-Based Fault-Tolerant Embedded System

Abstract

Fault tolerant is one of major requirements for embedded systems. As the embedded systems become more and more complex, more chances for various fault. When design embedded system developer has to handle these faults. Before handling faults designer has to identify and understand the types and nature of faults.Faults is the sources for low dependability, faults can be hardware and software. Hardware faults can be distinguished from systematic faults like software or design errors. The Fault can be deleted, such as extensive testing or formal verification and tolerated by fault tolerance techniques. We restrict ourselves to the problem of fault tolerance and refer to other methods for troubleshooting.This paper discusses a new design method about the fault tolerant system of embedded system. We designed a fault tolerant system of data acquisition system in dynamically re-configurable FPGA. The experiment results show that the system not only be able to higher self-adaptive ability and reliability, but also can Through the FGPA to complete a specific algorithm.