Design of Ultra-Wideband Low-Noise Amplifiers in 45-nm CMOS Technology: Comparison Between Planar Bulk and SOI FinFET Devices

Abstract

This paper deals with the design of single-stage differential low-noise amplifiers for ultra-wideband (UWB) applications, comparing state-of-the-art planar bulk and silicon-on-insulator (SOI) FinFET CMOS technologies featuring 45-nm gate length. To ensure a broadband input impedance matching, the g m-boosted topology has been chosen. Furthermore, the amplifiers have been designed to work over the whole UWB band (3.1-10.6 GHz), while driving a capacitive load, which is a realistic assumption for direct conversion receivers where the amplifier directly drives a mixer. The simulations (based on compact models obtained from preliminary measurements) highlight that, at the present stage of the technology development, the planar version of the circuit appears to outperform the FinFET one. The main reason is the superior cutoff frequency of planar devices in the inversion region, which allows the achievement of noise figure and voltage gain comparable to the FinFET counterpart, with a smaller power consumption

Design and Performance Measure of 5.4 GHZ CMOS Low Noise Amplifier Using Current Reuse Technique in 0.18μm Technology

“…Also, the NF of the CG LNA has a strong coupling with the bias point, or, in other words, the input matching resistance looking into the source. Reduction in the output noise figure of the CG LNA is achieved by using the gm-boosting technique that decouples the input matching and the NF of the CG LNA [13], [14], [15].Hence we adopt the common source(CS) topology to design the LNA. …”

A 4 mW 3–5 GHz current reuse gm-boosted short channel common-gate CMOS UWB LNA

“…This gain boosts the g m of M 1 by a factor of (1 ? A), without having to increase its device size or the bias current [1,2]. As a result, better noise performance and input matching is accomplished.…”

“…where, c and a (= g m /g do with g do being channel conductance at zero v ds ) are bias dependent parameters [2]. k is the channel length modulation coefficient and I D is the bias current through M 1 (and M 2 ).…”

“…R L is the equivalent load at the drain terminal of M 1 due to the parallel combination of the output impedance of M 1 , the bias resistance R G3 and the inductive reactance of L n . From (2), in case of the proposed novel LNA, the effective load resistance and the g m of M 1 are boosted by (|W| ? 1) and (|A| ?…”

“…In literature, several authors have reported UWB LNA design techniques, based on CS and CG circuit topologies [1]. Transconductance 'g m ' boosting is a well-known published technique for optimizing the performance of the CG LNA for UWB [2]. In this letter, a new, g m -boosted CG UWB LNA topology is presented, operating in the lower UWB band group (Mode-1), between 3.1 and 4.8 GHz of the multi-band (MB) orthogonal frequency-division multiplexing (OFDM) proposal [3].…”