1995
DOI: 10.1109/20.364806
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Design, performance, and extensions of the RAM-DFE architecture

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Cited by 15 publications
(3 citation statements)
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“…When this DFE is used with an analog forward equalizer, a high-speed ADC and digital equalizers are not needed, saving area and power. The use of the mixed-signal integrators reduces the die area as well as power dissipation when compared to previous work [2][3][4][5][6][7]. The performance of the analog DFE, in terms of BER, is comparable to previous DFE implementations.…”
Section: Discussionmentioning
confidence: 86%
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“…When this DFE is used with an analog forward equalizer, a high-speed ADC and digital equalizers are not needed, saving area and power. The use of the mixed-signal integrators reduces the die area as well as power dissipation when compared to previous work [2][3][4][5][6][7]. The performance of the analog DFE, in terms of BER, is comparable to previous DFE implementations.…”
Section: Discussionmentioning
confidence: 86%
“…The integer input is a binary signal with value ±1. This signal determines whether the counter should increment or decrement its current value according to the update equations in (2). Here, power dissipation and die area are saved by replacing the 6-b counter and DAC with a single analog integrator.…”
Section: Mixed-signal Integratormentioning
confidence: 99%
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