Design, simulation and comparative analysis of a novel FinFET based astable multivibrator

Gupta, Aayush; Mathur, Ruchir; Nizamuddin, M.

doi:10.1016/j.aeue.2018.12.007

Cited by 17 publications

(5 citation statements)

References 25 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…An electrical and mechanical property of it is greatly enhanced when carbon nanotubes (CNTs) are used. A CNTFET is distinguished by its superior electrostatic stability, high carrier transport, large thermal conductivity, and ballistic movement of charge carriers that results in high mobility [19,21,22]. A CNTFET, essentially uses an array of single-wall CNTs that are separated and integrated as the conduction channel, is a significant application of CNTs.…”

Section: Carbon Nanotube Field Effect Transistormentioning

confidence: 99%

See 1 more Smart Citation

Comparative Performance Study of Difference Differential Amplifier Using 7 nm and 14 nm FinFET Technologies and Carbon Nanotube FET

Kumar

Janakirani

Anand

et al. 2022

Journal of Nanomaterials

View full text Add to dashboard Cite

Difference differential amplifiers (DDA), which were built on FinFET and carbon nanotube FET (CNTFET), are frequently used for signal processing owing to their advantages of low-power dissipation and reduced device dimension. In this work, high-performance DDA was established using CNTFET model parameters as well as FinFET 7 nm and 14 nm technology. The DDA circuit used in this scenario was identically the same to the one used previously. With the use of Verilog AMS code-based Stanford model parameters applied CNTFET and 7 nm and 14 nm FinFETs, schematic capture and simulations of the DDA were carried out in the Symica environment. The mostly used measurements for assessing the performance of operational amplifiers were also adopted for DDA. The CNTFET-based difference differential amplifiers have slew rates of 10.8 V/femtosecond and 11.2 mV/femtosecond, respectively, with settling times of 0.65 femtosecond and 0.43 femtosecond, respectively. The power supply rejection ratio (PSRR) is 2.53 dB with a dynamic range of 198 mV and 6 mV for CNTFET DDA operating at 0.6 V DC. The incentives of CNTFET appropriateness for DDA designed in this study for any analogue front end were further demonstrated by using CNTFET for DDA with the achievement of open loop differential gain of 116.03 dB with BW of 4 GHz and phase margin of 270 and common mode gain of -28.65 dB with BW of 55.14 MHz and phase margin of 270.

show abstract

Section: Carbon Nanotube Field Effect Transistormentioning

confidence: 99%

“…A CNTFET's schematic is shown in Figure 3, and its gate to channel capacitance is shown in Figure 4. The channel has undoped CNTs, while the source and drain areas are identical to those of a typical MOSFET [19,22,25,31].…”

Section: Carbon Nanotube Field Effect Transistormentioning

confidence: 99%

Comparative Performance Study of Difference Differential Amplifier Using 7 nm and 14 nm FinFET Technologies and Carbon Nanotube FET

Kumar

Janakirani

Anand

et al. 2022

Journal of Nanomaterials

View full text Add to dashboard Cite

show abstract

“…To date, circuit schemes other than those shown in Fig. 7 have been proposed for astable multivibrators [23][24][25]. This circuit generates a square wave, as shown in Fig.…”

Section: Astable Multivibratormentioning

confidence: 99%

PUFs Analysis for Unstable Signals Using Analog Circuit

Soga¹,

Kang²

2022

ReBICTE

View full text Add to dashboard Cite

To date, physical unclonable functions (PUFs) have been extensively examined, and are used to distinguishgenuine and counterfeit products. Moreover, they are also attracting attention as one of themethods to solve the security problems of Internet of Things (IoT) devices. However, most PUFs arebased on integrated circuit (IC) memory and use digital modulation for authentication. This studyproposes a new PUF that uses analog circuits and analog values for authentication. The advantage ofanalog circuits is that they can handle analog values. Moreover, their characteristics do not changewhen the surrounding environment is adjusted. Research on analog PUFs that evaluate stable signalsand DC voltages has been proposed to date. This study uses an astable multivibrator to analyze PUFsfor unstable signals. For analysis, we examine the conventional method of calculating the hammingdistance of digital values and the method using machine learning(ML). Consequently, we were ableto identify individuals with unsteady signals from analog values when using ML.

show abstract

“…The sensor needed should have piezoelectric properties, lies in the range of a few nanometres and is flexible. Because of such requirements, the sensor used here is simulated in the paper [2]. The sensitivity of the sensor is kept at a value which is used to avoid false emergency signals reporting to the owner.…”

Section: Introductionmentioning

confidence: 99%

Architectural framework and register-transfer level design synthesis for cost-effective smart eyewear

Malhotra,

M. S.,

B. V.

et al. 2023

IJEECS

View full text Add to dashboard Cite

In today’s time more than 70% of the world’s population suffer from eye disnormalities leading to the usage of eyewear or spectacles. Integrating profound technologies with daily utilities could serve some of the issues improving and optimizing our lifestyle to the most. One such way is to infuse nanosized chip in eyewear i.e., powered spectacles or shades to detect the location of the spectacles whenever it is necessary. The nanosized chip proposed has features including self-designed Bluetooth operating digital circuit, timer logic, clock generation using astable multivibrator circuit, emergency button, beep alarm and impact sensor. The values of resistance and capacitace is calculated to be 18 K ohm and 47 uF to obtain 1 Hz frequency. An optimal pin placement arrangement is analyzed, and the timing waveform is simulated using Verilog as proof of logical working of the chip. 13 D flipflops have been calculated to refrain from eye related strains. This paper suggests a bottom-up approach and develops the architectural framework of the chip, its working flow, system on chip top-view, digital logic description of each block and its implementation using Verilog hardware description language (HDL). The complexity and computational cost of the designed chip is minimal thus being commercially viable.

show abstract

Design, simulation and comparative analysis of a novel FinFET based astable multivibrator

Cited by 17 publications

References 25 publications

Comparative Performance Study of Difference Differential Amplifier Using 7 nm and 14 nm FinFET Technologies and Carbon Nanotube FET

Comparative Performance Study of Difference Differential Amplifier Using 7 nm and 14 nm FinFET Technologies and Carbon Nanotube FET

PUFs Analysis for Unstable Signals Using Analog Circuit

Architectural framework and register-transfer level design synthesis for cost-effective smart eyewear

Contact Info

Product

Resources

About