Design, Simulation, and Fabrication of 4H-SiC Power SBDs With SIPOS FP Structure

Abstract

we introduce a field plate termination (FP) structure utilizing semi-insulating polycrystalline silicon (SIPOS) as the dielectrics in 4H-SiC Schottky barriers diodes (SBDs) in order to relieve the electric field enhancement at the junction corners and enhance the breakdown voltage of devices. In SIPOS FP structures, the maximum electric field (EM) within the dielectrics can be significant reduced in reverse blocking states due to the SIPOS with higher dielectric constant (k). Simulation and fabrication of 4H-SiC SBDs with the novel and traditional SiO2 FP were carried out. The simulations were performed using the commercial 2-D device simulator DESSIS. Compared to a traditional SiO2 FP structure device, the optimal design of the new type of SIPOS FP structure will lead to an increase of 780V in the breakdown voltage and a 44.8% EM reduction. From the experimental results, it has been proven that the new type of SIPOS FP structure indeed relieves the maximum electric field in the dielectric layer while simultaneously realizes an enhanced device breakdown voltage as high as 1630V, which is about 74.5% of the ideal theoretical breakdown voltage. Index Terms-Field plate, SIPOS dielectrics, 4H-SiC, Breakdown

Influence of the DLC Passivation Conductivity on the Performance of Silicon High-Power Diodes Over an Extended Temperature Range

“…This can be ascribed to the role played by the passivation layer in releasing the surface electric field. As in this kind of diodes the onset of avalanche in silicon takes place below the surface along the bevel, the DLC provides an effect similar to the SIPOS field-plate structures [9], [10], [11] . The difference between Nitrogen and Boron arises from the role of the different type of free charges moving in the passivation layer, as explained with the numerical analysis reported in [4].…”

Design Optimization of High Breakdown Voltage AlGaN/GaN High Electron Mobility Transistor with Insulator Dielectric Passivation Layer

“…The performance of the devices was simulated using twodimensional device simulators which solve Poisson's equation along with the continuity and drift diffusion equations [15][16][17][18][19][20][21].…”

Simulation of 4H-SiC Trench Junction Barrier Schottky Diodes with High-k Dielectrics

“…In reference [4], 4H-SiC trenches with the depth of 4.7μm and width of 1.5μm have been reported. On the other hand, the high-k dielectric is also a promising material, which is suitable for fabricating MOS structures and terminations in SiC devices [3] [5]. The realization of deep trenches and SiC devices with the high-k dielectrics makes it possible to further improve the performances of SiC JBSs.…”