Design Sketches For Optical Crossbar Switches Intended For Large-Scale Parallel Processing Applications

Hartmann, Alfred; Redfield, Steve

doi:10.1117/12.7976958

Cited by 30 publications

(3 citation statements)

References 12 publications

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“…Given that the area for each PE, z2, is determined so as to be just larger than the spot size, and assuming uniform illumination, the power that hits the detector is simply 2 d= EL z2 Using the limit on the number of processors (9) to derive a bound on z2, we get i.2 sin2 c cos4 a Ey2 d< 128)t2N…”

Section: The Arraymentioning

confidence: 99%

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Limitations on optical free-space crossbarlike interconnection networks

1990

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Providing the required interconnections between the processors of a parallel computer is a difficult problem: latency, switching control, cost, and crosstalk effects have to be taken into account. It is widely believed that the design might be simplified if optical technology is used. However, even optical interconnections cannot cater for an unlimited number of processors. For systems with up to about 1O -106 processors, it seems that the arrangement of the processors in space so that each can "see" the others is the limiting factor; A large part of the volume involved must stay empty for the information-bearing light beams. above that, diffraction effects and power requirements place a limit on the number of processors.

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Section: The Arraymentioning

confidence: 99%

“…The networks we study are based on the "DynaSwitch" switching element [1]. Technically, these networks use a beam steering approach rather than a beam spreading and masking approach [8,9]. In other words, the switches are not fully connected on a permanent basis, but rather each can potentially form a direct connection with all the others.…”

Section: Introductionmentioning

confidence: 99%

Limitations on optical free-space crossbarlike interconnection networks

1990

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“…Bridging would preclude this exploitation being done by transportable programs in a general purpose par- (8) The lines connect pairs of items such that the one on the right can be implemented eficiently by the one on the left. The overall diagram then signifies that in order to implement any of the software items on the right on any of the anticipated hardware designs on the left, one might as well take a route via the bridging model.…”

Section: (7)mentioning

confidence: 99%

Why BSP computers? (bulk-synchronous parallel computers)

Valiant

[1993] Proceedings Seventh International Parallel Processing Symposium

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3) This standard is unlikely to emerge from purely language level considerations. Sequential computing has become successful without a standard language. Also it is difficult to see how any set of features at the language level could command the required level of confidence unless it is underpinned by some form of agreed standard at a We discuss the need in parallel computing for a bridging model, and the appropriatenessof the BSP model for this role. AnIicipated Hardware Designs allel computing environment.Desired Programning Constructs.

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