Design Space Analysis for Cross-Point 1S1MTJ MRAM: Selector–MTJ Cooptimization

Chiang, Hung-Li; Chen, Tzu-Chiang; Song, Ming; Chen, Yu‐Sheng; Chiu, Jung-Piao; Chiang, Katherine; Manfrini, Mauricio; Cai, Jin; Gallagher, W. J.; Wang, Tahui; Diaz, C.H.; Wong, H.-S. Philip

doi:10.1109/ted.2020.3005118

Cited by 4 publications

(1 citation statement)

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“…The hold voltage (V H ) is minimum voltage required to maintain the reverse bias in the ON state after passing the threshold. Although the V H parameter was not mentioned in [10] [14], [4] reports that the V T −V H is typically more than 250mV due to the physics of non-linear threshold switching and validated through experiments. For our analysis, we assume the V H to be a quarter of V T for simplicity.…”

Section: Miim Diodementioning

confidence: 99%

Design Space Exploration of Ferroelectric Tunnel Junction Toward Crossbar Memories

Jao

Xiao

Saha

et al. 2021

IEEE J. Explor. Solid-State Comput. Devices Circuits

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We perform a simulation-based analysis on the potential of emerging ferroelectric tunnel junctions (FTJ) as a memory device for crossbar arrays. Though FTJs are promising due to their low power switching characteristics compared to other emerging technologies, the greatest challenge for FTJs is the trade-off between integration density and read performance. Our analysis highlights the need to co-optimize the ferroelectric thickness of the FTJ and read/write voltages to achieve proper functionality at large array sizes. Our analysis shows that FTJbased crossbar achieves 93% higher sense margin at iso-read power of 116nW (per bit) but this FTJ design comes at cost of 9.28× higher write power at iso-write time of 250 ns. In response, we study the potential trade-offs of design points outside the feasible region to understand what device characteristics are desired overcome such challenges.

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Section: Miim Diodementioning

confidence: 99%