Designing embedded systems is a challenging task during which wrong choices can lead to extremely costly re-design loops, especially when these wrong choices are made during the algorithm specification and the mapping over the selected architecture. In this paper we propose a high-level approach for design space exploration, using a usual standard language as input. More precisely we present the two first steps of the Design Trotter framework: (i) the specification step and its underlying internal model (HCDFG: Hierarchical and Control Data Flow Graph) and (ii) the characterization step which takes place very early in the design flow. Indeed, once transformed into our internal representation, the specification is rapidly and automatically characterized and explored at the algorithmic level. The framework provides the designer with metrics so that he can evaluate, very early in the design process, the impact of algorithmic choices on resource requirements in terms of processing, control, memory bandwidth and potential parallelism at different levels of granularity. The overall aim of our approach is to improve the algorithm/architecture matching that sorely influences the implementation efficiency in terms of silicon area, performances and energy consumption. We give examples which illustrate how designers can refer to the outcomes of the Design Trotter framework in order to select or build suitable architectures for specific applications.