Design verification for sub-70-nm DRAM nodes via metal fix using E-beam direct write

Keil, Katja; Jaschinsky, Philipp; Hohle, Christoph; Choi, Kang‐Hoon; Schneider, R.; Tesauro, Mark R.; Thrum, F.; Zimmermann, Roy; Kretz, Johannes

doi:10.1117/12.835206

Cited by 5 publications

(4 citation statements)

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“…A Mix & Match concept based on litho-etch-litho-etch (LELE) was selected to integrate the EBDW into the existing semiconductor manufacturing process flow [4]- [5]. For the experiments, a Trench First Via Last approach with a TiN hard mask was applied.…”

Section: Dual Damascene Integration Conceptmentioning

confidence: 99%

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Verification of E-Beam direct write integration into 28nm BEOL SRAM technology

Hohle¹,

Choi²,

Gutsch³

et al. 2015

SPIE Proceedings

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Electron beam direct write lithography (EBDW) potentially offers advantages for low-volume semiconductor manufacturing, rapid prototyping or design verification due to its high flexibility without the need of costly masks. However, the integration of this advanced patterning technology into complex CMOS manufacturing processes remains challenging. The low throughput of today’s single e-Beam tools limits high volume manufacturing applications and maturity of parallel (multi) beam systems is still insufficient [1,2]. Additional concerns like transistor or material damage of underlying layers during exposure at high electron density or acceleration voltage have to be addressed for advanced technology nodes. In the past we successfully proved that potential degradation effects of high-k materials or ULK shrink can be neglected and were excluded by demonstrating integrated electrical results of 28nm node transistor and BEOL performance following 50kV electron beam dry exposure [3]. Here we will give an update on the integration of EBDW in the 300mm CMOS manufacturing processes of advanced integrated circuits at the 28nm SRAM node of GLOBALFOUNDRIES Dresden. The work is an update to what has been previously published [4]. E-beam patterning results of BEOL full chip metal and via layers with a dual damascene integration scheme using a 50kV VISTEC SB3050DW variable shaped electron beam direct writer at Fraunhofer IPMSCNT are demonstrated. For the patterning of the Metal layer a Mix & Match concept based on the sequence litho - etch -litho -etch (LELE) was developed and evaluated wherein several exposure fields were blanked out during the optical exposure. Etch results are shown and compared to the POR. Results are also shown on overlay performance and optimized e-Beam exposure time using most advanced data prep solutions and resist processes. The patterning results have been verified using fully integrated electrical measurement of metal lines and vias on wafer level. In summary we demonstrate the integration capability of EBDW into a productive CMOS process flow at the example of the 28nm SRAM technology node

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Section: Dual Damascene Integration Conceptmentioning

confidence: 99%

“…For the patterning of the metal layer, a mix & match concept based on the sequence litho -etchlitho -etch (LELE) was developed and evaluated [4][5][6]. Therefore several exposure fields were blanked out during the optical scanner exposure.…”

Section: Introductionmentioning

confidence: 99%

Verification of E-Beam direct write integration into 28nm BEOL SRAM technology

Hohle¹,

Choi²,

Gutsch³

et al. 2015

SPIE Proceedings

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“…Two commercially available e-beam resists with different tonality and appropriate etch selectivity were used: a positive chemically amplified resist (pCAR) with a nominal film thickness of 130nm as well as a Silicon containing negative tone resist (Hydrogenesilsesquioxane (HSQ), XR1541-002, Dow Chemicals) with a thickness of 90nm (post coat). All patterns were exposed either using a VISTEC SB3050DW shaped beam tool at Fraunhofer CNT [16] or using the PML2 Alpha Tool at IMS Nanofabrication comprising 2500 programmable beams [5]. Both e-beam tools are operating at 50kV accelerating voltage.…”

Section: E-beam Lithographymentioning

confidence: 99%

Feasibility study of optical/e-beam complementary lithography

Hohle¹,

Choi²,

Freitag³

et al. 2012

Alternative Lithographic Technologies IV

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Using electron beam direct write (EBDW) as a complementary approach together with standard optical lithography at 193nm or EUV wavelength has been proposed only lately and might be a reasonable solution for low volume CMOS manufacturing and special applications as well as design rule restrictions. Here, the high throughput of the optical litho can be combined with the high resolution and the high flexibility of the e-beam by using a mix & match approach (Litho- Etch-Litho-Etch, LELE). Complementary Lithography is mainly driven by special design requirements for unidirectional (1-D gridded) Manhattan type design layouts that enable scaling of advanced logic chips. This requires significant data prep efforts such as layout splitting. In this paper we will show recent results of Complementary Lithography using 193nm immersion generated 50nm lines/space pattern addressing the 32nm logic technology node that were cut with electron beam direct write. Regular lines and space arrays were patterned at GLOBALFOUNDRIES Dresden and have been cut in predefined areas using a VISTEC SB3050DW e-beam direct writer (50KV Variable Shaped Beam) at Fraunhofer Center Nanoelectronic Technologies (CNT), Dresden, as well as on the PML2 tool at IMS Nanofabrication, Vienna. Two types of e-beam resists were used for the cut exposure. Integration issues as well as overlay requirements and performance improvements necessary for this mix & match approach will be discussed

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“…For example, design changes can be implemented overnight and verified before mask tape out, different design versions can be tested on one wafer or design bugs can be corrected (metal fix). 3 EBDW provides high resolution and variable shaped beam systems have higher throughput compared to Gaussian beam systems. Furthermore, mask costs are saved and mask delivery delay is avoided.…”

Section: Introductionmentioning

confidence: 98%

Demonstration of 22nm SRAM features with patternable hafnium oxide-based resist material using electron-beam lithography

Thrun¹,

Choi²,

Freitag³

et al. 2012

SPIE Proceedings

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To fulfill the requirements of future technology nodes new resists with high resolution, high sensitivity and low LWR and LER respectively are needed. A new inorganic non-chemically amplified resist (XE15IB, an experimental resist provided by Inpria Corp.) was investigated. The resist is spin-cast from aqueous solution and is based on hafnium oxide. Metal oxide based resist as XE15IB supersede other resist materials due to its high etch resistance. 1, 2 This new material can be considered as a direct patternable spin on hard mask. XE15IB was processed in a 300 mm complementary metal oxide semiconductor (CMOS) manufacturing environment and exposed on a 50 kV VISTEC SB3050DW variable shaped electron beam direct writer at Fraunhofer Center Nanoelectronic Technologies (CNT). The resist was evaluated in terms of contrast, sensitivity and resolution. The process characteristics required for CMOS manufacturing such as delay stability were also examined. Furthermore, by printing a large static random access Memory (SRAM) pattern (design CD of 22 nm), the exposure of a real application pattern was demonstrated.

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Design verification for sub-70-nm DRAM nodes via metal fix using E-beam direct write

Cited by 5 publications

References 0 publications

Verification of E-Beam direct write integration into 28nm BEOL SRAM technology

Verification of E-Beam direct write integration into 28nm BEOL SRAM technology

Feasibility study of optical/e-beam complementary lithography

Demonstration of 22nm SRAM features with patternable hafnium oxide-based resist material using electron-beam lithography

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