2012 IEEE International Workshop on Antenna Technology (iWAT) 2012
DOI: 10.1109/iwat.2012.6178682
|View full text |Cite
|
Sign up to set email alerts
|

Designs of fully on-chip antennas in (Bi)CMOS technology

Abstract: ABSTRACT:The paper presents several feasible millimeter wave on-chip antenna designs suitable to be fabricated in CMOS technology without any additional process. The results are listed and compared with state-of-the-art designs in the literature. The difficulties in designing high efficiency antenna on CMOS chip are discussed.

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1

Citation Types

0
3
0

Year Published

2012
2012
2016
2016

Publication Types

Select...
4
1

Relationship

0
5

Authors

Journals

citations
Cited by 5 publications
(3 citation statements)
references
References 11 publications
0
3
0
Order By: Relevance
“…The OCA and antennain-package (AiP) are smart technologies that provide the single-chip radio solution. These technologies allow the codesign of the antenna and the radio chip (in micro/nano CMOS technology) into the same high-sensitivity silicon substrate package, which compresses the die area of the radio system [87][88][89][90][91][92]. There is a tradeoff between antenna size and performance in terms of operating frequency, that is, the higher (lower) the frequency, the smaller (larger) the size can be.…”
Section: Discussionmentioning
confidence: 99%
“…The OCA and antennain-package (AiP) are smart technologies that provide the single-chip radio solution. These technologies allow the codesign of the antenna and the radio chip (in micro/nano CMOS technology) into the same high-sensitivity silicon substrate package, which compresses the die area of the radio system [87][88][89][90][91][92]. There is a tradeoff between antenna size and performance in terms of operating frequency, that is, the higher (lower) the frequency, the smaller (larger) the size can be.…”
Section: Discussionmentioning
confidence: 99%
“…Moreover gain and efficiency of on-chip antennas are normally lower compared to in-package versions. Examples of realized on-chip antennas include a D-band on-chip end-fire Yagi-Uda antenna with 4.7 dBi peak gain and 76 % radiation efficiency based on a 130-nm SiGe BiCMOS process [1]; an on-chip dual dipole antenna with 7 dBi gain and 60 % efficiency implemented on a SiGe BiCMOS process [2]; and a slot antenna of -2 dBi gain and 18 % efficiency by a CMOS process [3]. Besides the limited antenna gain and radiation efficiency, the considerable clean room processing cost is another barrier for mass production.…”
Section: Introductionmentioning
confidence: 99%
“…Superstrate antennas can increase radiation efficiency, however with the cost of increased complexity because of their non-planar structure and cost due to the extra assembly A , they may not be an attractive and optimal solution. Another technique to improve antenna performance is to develop high impedance surface (HIS) or artificial magnetic conductor (AMC) based broad-side on-chip antennas, which have also been reported in the literature [7][8]. But the reported measured gain is around 1 dBi or less.…”
Section: Introductionmentioning
confidence: 99%