Detecting and Resolving Security Violations in Reconfigurable Scan Networks

Raiola, Pascal; Kochte, Michael A.; Atteya, Ahmed; Gomez, Laura Rodriguez; Wunderlich, Hans-Joachim; Becker, Bernd; Sauer, Matthias

doi:10.1109/iolts.2018.8474188

Cited by 10 publications

(5 citation statements)

References 15 publications

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“…In [50] the same authors enhanced this approach resorting to a model checking technique to verify some security properties of the RSN. More recently, in [51] the authors proposed a new method that detects security violations in the RSN and structurally transforms it into a secure RSN. The security specification for applying this model is based on the definition of a trust category for each instrument, together with the definition of a sensitivity level of the data that are shifted through the RSN.…”

Section: Towards a Formalization Of Securitymentioning

confidence: 99%

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A Survey on Security Threats and Countermeasures in IEEE Test Standards

et al. 2019

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The growth in complexity of Integrated Circuits (IC) is supported, amongst other factors, by the development of standardized test infrastructures. The feasibility of both end-ofmanufacturing and in-field tests heavily depends on the presence of these infrastructures that give detailed access to the IC. The standard test infrastructures are referred as IEEE Std. 1149.1 (JTAG), IEEE Std. 1500 and IEEE Std. 1687 (IJTAG). The security issues arising from the presence of these infrastructures have been fully exposed in the last two decades. This led to the publication of several practical attacks showing how a non-protected test infrastructure can end into the jeopardizing of the entire system. As a consequence, many countermeasures have been proposed. In this survey, we provide: (i) a taxonomy of the attacks that can be performed exploiting the standard test infrastructures; (ii) a taxonomy of countermeasures inspired by the kind of security primitives that are granted in each case.

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Section: Towards a Formalization Of Securitymentioning

confidence: 99%

“…It is composed of a series of IJTAG networks, described in the ICL language, of different complexities. These benchmarks have recently found their first application as experimental platform for RSN security purpose in [51].…”

Section: Towards a Formalization Of Securitymentioning

confidence: 99%

A Survey on Security Threats and Countermeasures in IEEE Test Standards

et al. 2019

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“…Based on this, many countermeasures are put forward to counter the scan-based attacks [35][36][37][38][39][40][41][42][43][44]. Previously, the existing advanced DFT architecture includes test response compactor, X-masker [45,46], and X-tolerance [47,48].…”

Section: Introductionmentioning

confidence: 99%

Preventing Scan-Based Side-Channel Attacks by Scan Obfuscating with a Configurable Shift Register

Wang

Yin

Cai

et al. 2021

Security and Communication Networks

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Scan test is widely used in integrated circuit test. However, the excellent observability and controllability provided by the scan test gives attackers an opportunity to obtain sensitive information by using scan design to threaten circuit security. Hence, the primary motivation of this paper is to improve the existing DFT technique, i.e., to enhance the chip security on the premise of guaranteeing test quality. In this paper, we propose a new scan design method against scan-based side-channel attack. In the proposed method, the encryption structure is adopted, which requires the correct test authorization code to carry out normal test operation. Without the correct test authorization, the attackers cannot obtain the desired scan data, preventing the scan-based side-channel attacks. Furthermore, the test authorization code is determined by the nonvolatile memory built into the chip to realize the inconsistency of the test authorization code for each chip.

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“…IEEE P1687 标准 [1] 也被称为内部联合测试行动组(internal joint test action group, IJTAG), 使用段插入位(segment insert bit, SIB)构建可重构扫描网络, 通过向 SIB 移入配置数据改变扫描链. 虽然在可重构扫描网络中可以灵活地配置扫描路径, 但是也存在着一些安全问题 [2][3] [4][5][6][7][8][9][10][11][12] ; 另一类是防止恶意仪器对传输数据的窜改和嗅探攻击 [13][14][15][16] . 文献 [4][5] 通过使用多个分布式密钥位增大未经授权用户对重要仪器访问的难度.…”

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“…文献 [4][5] 通过使用多个分布式密钥位增大未经授权用户对重要仪器访问的难度. 文献 [6][7] [4][5][6][7][8][9][10][11][12] , 能使 IJTAG 网络免受恶意仪器对传输数据的嗅探或窜改 [13][14][15][16] Step1.…”

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Lock Isolation Security Architecture for Reconfigurable Scanning Networks

Liu

Wang

Ren

2021

J Comput-Aided Design Comput Graphics

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To protect the reconfigurable scanning network from the influence of unauthorized access, tampering of transmitted data by malicious instruments and sniffing, a lock isolation security structure is proposed. Firstly, the presented structure divides the instruments without security threat to each other into one group, and the groups can be accessed one by one via the isolated signals, which can prevent malicious instruments tampering and sniffing transmitted data. Secondly, the key instruments are protected by the lock segment insertion bit. The lock segment insertion bit can only be opened when multiple key values at specific positions are set to specific values (0, 1 sequence), which can increase the difficulty of unauthorized access. Besides, to reduce the hardware overhead, and the difficulty of place and route caused by excessive instrument groups, instrument grouping algorithm is proposed. The proposed algorithm firstly constructs an undirected graph based on the security relationship among instruments. Then the maximal independent sets of the undirected are obtained. In this way, the number of instrument groups is reduced greatly. Compared to other similar methodologies, the experimental results conducted on ITC 02 benchmark circuits show that the time consumption for opening the locking segment insertion bit of the proposed security structure increased by 7 times, and the average percentage reduction of area, power consumption and wire length is 3.81%, 9.02% and 4.55%, respectively.

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Detecting and Resolving Security Violations in Reconfigurable Scan Networks

Cited by 10 publications

References 15 publications

A Survey on Security Threats and Countermeasures in IEEE Test Standards

A Survey on Security Threats and Countermeasures in IEEE Test Standards

Preventing Scan-Based Side-Channel Attacks by Scan Obfuscating with a Configurable Shift Register

Lock Isolation Security Architecture for Reconfigurable Scanning Networks

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