Developing Domain-Knowledge Evolutionary Algorithms for Network-on-Chip Application Mapping

Radu, Ciprian; Mahbub, Md. Shahriar; Vinan, Lucian

doi:10.1016/j.micpro.2012.11.003

Cited by 8 publications

(14 citation statements)

References 32 publications

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“…Optimization search with refinement such as simulated annealing (SA) [3,4], genetic algorithm (GA) [5,6], and particle swarm optimization (PSO) [7] has been used in application mapping in NoC. GA is the predominant algorithm for application mapping.…”

Section: Applied Computational Intelligence and Soft Computingmentioning

confidence: 99%

“…Reference [14] compares several application mapping algorithms using bit energy model for low energy consumption. Simulated annealing (SA) [3,4,14] and GA [5] were also proposed as the application mapping techniques to optimize energy consumption using bit energy model. In [1,7,13,[15][16][17], the application mapping optimization is based on communication cost in terms of the distance among communicating cores.…”

Section: Related Workmentioning

confidence: 99%

“…Domain knowledge has been proposed for faster convergence. In the domain knowledge evolutionary algorithm [5], mapping similarity crossover (MS) has been proposed to maintain the common characteristic in genes between the parents and the rest of the genes using greedy mapping. Mapping similarity approach is able to handle symmetric problem in mesh topology but the technique increases the computation time drastically as the NoC size increases.…”

Section: Related Workmentioning

confidence: 99%

“…OSA shows better mapping quality compared to CSA. However, author in [5] has shown that an evolutionary algorithm performs better than OSA. Particle swarm optimization (PSO) has been proposed with deterministic initial mapping to explore the search space [7].…”

Section: Related Workmentioning

confidence: 99%

“…Mapping similarity has been proposed where offsprings keep the common characteristics of their parent in terms of sum-of-distance among communicating cores [5]. The genes are evaluated one by one to check for common characteristics.…”

Section: Knowledge-based Genetic Operatormentioning

confidence: 99%

See 4 more Smart Citations

Network Partitioning Domain Knowledge Multiobjective Application Mapping for Large-Scale Network-on-Chip

Tei

Hau

Shaikh-Husin

et al. 2014

Applied Computational Intelligence and Soft Computing

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This paper proposes a multiobjective application mapping technique targeted for large-scale network-on-chip (NoC). As the number of intellectual property (IP) cores in multiprocessor system-on-chip (MPSoC) increases, NoC application mapping to find optimum core-to-topology mapping becomes more challenging. Besides, the conflicting cost and performance trade-off makes multiobjective application mapping techniques even more complex. This paper proposes an application mapping technique that incorporates domain knowledge into genetic algorithm (GA). The initial population of GA is initialized with network partitioning (NP) while the crossover operator is guided with knowledge on communication demands. NP reduces the large-scale application mapping complexity and provides GA with a potential mapping search space. The proposed genetic operator is compared with stateof-the-art genetic operators in terms of solution quality. In this work, multiobjective optimization of energy and thermal-balance is considered. Through simulation, knowledge-based initial mapping shows significant improvement in Pareto front compared to random initial mapping that is widely used. The proposed knowledge-based crossover also shows better Pareto front compared to state-of-the-art knowledge-based crossover.

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Section: Applied Computational Intelligence and Soft Computingmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Section: Knowledge-based Genetic Operatormentioning

confidence: 99%

See 3 more Smart Citations

Network Partitioning Domain Knowledge Multiobjective Application Mapping for Large-Scale Network-on-Chip

Tei

Hau

Shaikh-Husin

et al. 2014

Applied Computational Intelligence and Soft Computing

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Finding near‐perfect parameters for hardware and code optimizations with automatic multi‐objective design space explorations

Jahr

Calborean

Vintan

et al. 2012

Concurrency and Computation

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SummaryIn the design process of computer systems or processor architectures, typically many different parameters are exposed to configure, tune, and optimize every component of a system. For evaluations and before production, it is desirable to know the best setting for all parameters. Processing speed is no longer the only objective that needs to be optimized; power consumption, area, and so on have become very important. Thus, the best configurations have to be found in respect to multiple objectives. In this article, we use a multi‐objective design space exploration tool called Framework for Automatic Design Space Exploration (FADSE) to automatically find near‐optimal configurations in the vast design space of a processor architecture together with a tool for code optimizations and hence evaluate both automatically. As example, we use the Grid ALU Processor (GAP) and its postlink optimizer called GAPtimize, which can apply feedback‐directed and platform‐specific code optimizations. Our results show that FADSE is able to cope with both design spaces. Less than 25% of the maximal reasonable hardware effort for the scalable elements of the GAP is enough to achieve the processor's performance maximum. With a performance reduction tolerance of 10%, the necessary hardware complexity can be further reduced by about two‐thirds. The found high‐quality configurations are analyzed, exhibiting strong relationships between the parameters of the GAP, the distribution of complexity, and the total performance. These performance numbers can be improved by applying code optimizations concurrently to optimizing the hardware parameters. FADSE can find near‐optimal configurations by effectively combining and selecting parameters for hardware and code optimizations in a short time. The maximum observed speedup is 15%. With the use of code optimizations, the maximum possible reduction of the hardware resources, while sustaining the same performance level, is 50%.Copyright © 2012 John Wiley & Sons, Ltd.

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Performance and energy optimisation in CPUs through fuzzy knowledge representation

Gellért

Florea

Fiore

et al. 2019

Information Sciences

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Developing Domain-Knowledge Evolutionary Algorithms for Network-on-Chip Application Mapping

Cited by 8 publications

References 32 publications

Network Partitioning Domain Knowledge Multiobjective Application Mapping for Large-Scale Network-on-Chip

Network Partitioning Domain Knowledge Multiobjective Application Mapping for Large-Scale Network-on-Chip

Finding near‐perfect parameters for hardware and code optimizations with automatic multi‐objective design space explorations

Performance and energy optimisation in CPUs through fuzzy knowledge representation

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