Development and Assessment of Global-Local Modeling Technique Used in Advanced Microelectronic Packaging

Che, F.X.; Pang, H.L.J.; Zhu, W.H.; Sun, Wenjie; Sun, A.Y.S.; Wang, C.K.; Tan, Henry

doi:10.1109/esime.2007.360018

Cited by 9 publications

(4 citation statements)

References 18 publications

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“…With the advances in computer technology and further sophistication of FEA software, it is likely that a detailed non-linear 3D finite element modeling approach can be employed in a more computational efficiency manner than previous modeling approaches which required some modeling assumptions for model size reduction [10,[12][13]. Nevertheless, mesh generation for a part containing complex geometries or fine features in adjacent regions could still be a challenging and tedious task that may somehow require the geometrical simplification or skillful meshing technique for a quality mesh.…”

Section: Surface-based Tie Constraint Techniquementioning

confidence: 99%

“…Previous studies by [12] demonstrated that multi-point constraint (MPC) should not be imposed at the solder interface where is the region of high stress/strain gradient. Moreover, even applying global-local modeling approach [13], the cut-boundaries for the submodel region      ) ( f N should be located further away from the solder interface region.…”

Section: Surface-based Tie Constraint Techniquementioning

confidence: 99%

“…Since the model has been validated, other design options can be explored to assess the impacts on board level reliability of eWLB packages under temperature cycling test condition [13]. Normally, the maximum package size of FI-WLP is less than 7x7mm when underfill material is not used.…”

Section: Numerical Case Studymentioning

confidence: 99%

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A finite element analysis of board level temperature cycling reliability of embedded wafer level BGA (eWLB) package

Chow

Lin

Ouyang

et al. 2012

2012 IEEE 62nd Electronic Components and Technology Conference

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Three dimensional finite element analysis (FEA) is performed to assess the board level temperature cycling reliability for lead-free solder Sn96.5Ag3Cu0.5 (SAC305) used in eWLB packages. With Anand viscoplastic constitutive model used for the solder material, the chosen damage parameters, i.e. accumulated creep strain or accumulated creep strain energy density, can be derived from the finite element analysis (FEA) models and then can be correlated with the solder fatigue life obtained from the temperature cycling tests.In this study, a surface-based tie constraint technique is employed in the FEA models to facilitate mesh transition requirements at various interfaces of incompatible meshes. It is particularly the case arising from the die edges overlie the circular solder pads in the models. To deal with such situations, the FEA model for the entire package-to-board assembly can be strategically split into two parts and then connected to each other with tie constraints for the ease of meshing effort. It is found that this technique can help in managing a more uniform mesh distribution over the regions of interest, such as solder joints and dielectric layers with refine meshes, and yet allow a relatively coarse mesh to be assigned elsewhere for model size reduction. Thus, the computational efficiency for these tie-constraint models can be improved significantly as compared with their corresponding single part models with fine meshes and yet the model accuracy for the critical solder joint fatigue life estimation can be preserved. A model validation and numerical case study will be provided to illustrate the application of this modeling technique.

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Section: Surface-based Tie Constraint Techniquementioning

confidence: 99%

Section: Surface-based Tie Constraint Techniquementioning

confidence: 99%

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A finite element analysis of board level temperature cycling reliability of embedded wafer level BGA (eWLB) package

Chow

Lin

Ouyang

et al. 2012

2012 IEEE 62nd Electronic Components and Technology Conference

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“…In order to reduce calculation time and increase the research efficiency, the global-local modeling approaches now are widely used, such as specific boundary constraints (SBC) method [4][5] and multi-point constraints (MPC) method [6][7][8]. Therefore, in this research MPC method is used to simulate and direct-field coupling thermal-structural FE analysis were conducted to analyze the temperature distribution of IGBT and the mechanical behaviors of bonding wire under cyclic power cycling test.…”

Section: Introductionmentioning

confidence: 99%

Thermal analysis and reliability assessment of power module under power cycling test using global- local finite element method

Chiang

Hsu

et al. 2014

2014 9th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)

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Insulated gate bipolar transistor (IGBT) power modules have acquired fast switching and low conduction loss characteristics. Because of these electrical characteristics, the IGBT has been widely applied in power supplies, e.g. hybrid electric vehicle, wind power generation, etc. However, the IGBT during rapid transient operation under high power can cause the IGBT chip to lead high junction temperature and high temperature gradients. Furthermore, because of the coefficient of thermal expansion (CTE) mismatch between the various material layers, the bonding wires and the solder joints are subjected to thermo-mechanical stress which cause solder fatigue and bonding wire failure, and then affect the reliability of IGBT under actual operation conditions. A 3-D finite element (FE) model was established base on real test samples. The simulation results found that the maximum junction temperature 112.5 is observed at the middle of IGBT chip under the load current of 40 A. Then analyze the mechanical behaviors of IGBT, the structural simulation results show that under a cyclic power environment, the stress concentration within the wire, caused by the CTE mismatch between the wire and the IGBT chip. Therefore, the wire/chip interface is the weaker portion of the power module. Finally, according to the life prediction models of literatures, this paper assessed the reliability of bonding wire in order to investigate the effects of thermal stress and strain on reliability during power cycling test.

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Fatigue life estimation of FBGA memory device under vibration

Cinar

Jang

2014

J Mech Sci Technol

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Development and Assessment of Global-Local Modeling Technique Used in Advanced Microelectronic Packaging

Cited by 9 publications

References 18 publications

A finite element analysis of board level temperature cycling reliability of embedded wafer level BGA (eWLB) package

A finite element analysis of board level temperature cycling reliability of embedded wafer level BGA (eWLB) package

Thermal analysis and reliability assessment of power module under power cycling test using global- local finite element method

Fatigue life estimation of FBGA memory device under vibration

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