Development and evaluation of a microstep DFA vulnerability estimation method

Abstract

Abstract:Recently, various studies of attack methods of round reduction differential fault analysis (DFA) using fault injection in block cipher-implemented microcontrollers have been reported. However, few studies have focused on the quantitative evaluation method of round reduction DFA vulnerability using detailed fault injection timing dependency of attack success rate. This is required to improve microcontroller security. Hence, we propose a quantitative evaluation method against round reduction DFA using a micro step DFA vulnerability chart and a vulnerability estimator (VE) that consists of pairs of fault injection timing and attack success rate.

Round Addition Using Faults for Generalized Feistel Network

“…Our results show that the double addition attack succeeded 60 times in 1000 trials. The experimental result was obtained in the same manner with [6]. In this result, we conclude that the round addition by command bypassing is feasible for practical block cipher systems.…”

“…On the other hand, Kaminaga et al [6] show the effectiveness of a combination of multiple branches and a brown-out detector (BOD), which is a type of low voltage detector, in their experiment using the ATmega168 (Atmel, USA) microcontroller. According to their experiment, round reduction did not work against the combination of triple branches and BOD.…”

Round Addition DFA on 80-bit Piccolo and TWINE

“…Differential fault analysis (DFA) using operation bypassing is an effective attack technique for cipher-implemented microcontroller [1]. On the basis of this technique, we have shown that round addition DFA using a bypassing increment or decrement command is effective for attacks against cipher-implemented microcontrollers.…”